Jiajia Chen
Orcid: 0000-0002-1642-8007Affiliations:
- Singapore University of Technology and Design, Singapore
- Nanyang Technological University, Centre for High Performance Embedded Systems, Singapore (PhD 2010)
According to our database1,
Jiajia Chen
authored at least 38 papers
between 2006 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
IEEE Trans. Circuits Syst. II Express Briefs, February, 2024
2023
A new adaptive window-based guided filtering and interpolation for polarization image demosaicing.
IET Image Process., 2023
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
2021
Micro-Doppler Signature-Based Detection, Classification, and Localization of Small UAV With Long Short-Term Memory Neural Network.
IEEE Trans. Geosci. Remote. Sens., 2021
2020
A New Polarization Image Demosaicking Algorithm by Exploiting Inter-Channel Correlations With Guided Filtering.
IEEE Trans. Image Process., 2020
An Optimized Quantization Constraints Set for Image Restoration and its GPU Implementation.
IEEE Trans. Image Process., 2020
IEEE Trans. Circuits Syst. Video Technol., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2020
A New Al gorithm to Derive Hardware Efficient Integer Discrete Cosine Transform for HEVC.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2020
2019
IEICE Electron. Express, 2019
Area- and Power-Efficient Nearly-Linear Phase Response IIR Filter by Iterative Convex Optimization.
IEEE Access, 2019
Hardware Efficient Integer Discrete Cosine Transform for Efficient Image/Video Compression.
IEEE Access, 2019
2018
IEEE Trans. Ind. Electron., 2018
A New Accurate and Fast Homography Computation Algorithm for Sports and Traffic Video Analysis.
IEEE Trans. Circuits Syst. Video Technol., 2018
Tap Delay-and-Accumulate Cost Aware Coefficient Synthesis Algorithm for the Design of Area-Power Efficient FIR Filters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Drone Classification and Localization Using Micro-Doppler Signature with Low-Frequency Signal.
Proceedings of the IEEE International Conference on Communication Systems, 2018
2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
Proceedings of the 2017 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2017
2016
Hypergraph Based Minimum Arborescence Algorithm for the Optimization and Reoptimization of Multiple Constant Multiplications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
A New Paradigm of Common Subexpression Elimination by Unification of Addition and Subtraction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Proceedings of the 24th European Signal Processing Conference, 2016
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2016
Low complexity and quasi-linear phase IIR filters design based on iterative convex optimization.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
2015
Novel Design Algorithm for Low Complexity Programmable FIR Filters Based on Extended Double Base Number System.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Design of low complexity programmable FIR filters using multiplexers array optimization.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
New algorithm for design of low complexity twiddle factor multipliers in radix-2 FFT.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
2014
Design of hardware efficient modulated filter bank for EEG signals feature extraction.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Design of programmable FIR filters using Canonical Double Based Number Representation.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
2006
Maximum likelihood disjunctive decomposition to reduced multirooted DAG for FIR filter design.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006