Jia-Sheng Huang

Orcid: 0000-0002-8955-8021

According to our database1, Jia-Sheng Huang authored at least 4 papers between 2020 and 2023.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
A Multistep Multistage Fifth-Order Incremental Delta Sigma Analog-to-Digital Converter for Sensor Interfaces.
IEEE J. Solid State Circuits, October, 2023

2021
A Multi-Step Incremental Analog-to-Digital Converter With a Single Opamp and Two- Capacitor SAR Extended Counting.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A 677-μW 90-dB DR 16-kHz BW Incremental ΔΣ ADC for Sensor Interfaces.
Proceedings of the International Symposium on VLSI Design, Automation and Test, 2021

2020
A Two-Step Multi-Stage Noise-Shaping Incremental Analog-to-Digital Converter (Invited Paper).
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020


  Loading...