Ji-Soo Chang
Orcid: 0000-0002-0228-2238
According to our database1,
Ji-Soo Chang
authored at least 6 papers
between 2010 and 2023.
Collaborative distances:
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Bibliography
2023
A 1.05-A/m Minimum Magnetic Field Strength Single-Chip, Fully Integrated Biometric Smart Card SoC Achieving 792.5-ms Transaction Time With Anti-Spoofing Fingerprint Authentication.
IEEE J. Solid State Circuits, 2023
2022
A 1.05A/m Minimum Magnetic Field Strength Single-Chip Fully Integrated Biometric Smart Card SoC Achieving 1014.7ms Transaction Time with Anti-Spoofing Fingerprint Authentication.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2019
A Sub-6-GHz 5G New Radio RF Transceiver Supporting EN-DC With 3.15-Gb/s DL and 1.27-Gb/s UL in 14-nm FinFET CMOS.
IEEE J. Solid State Circuits, 2019
2013
Fast Output Voltage-Regulated PWM Buck Converter With an Adaptive Ramp Amplitude Control.
IEEE Trans. Circuits Syst. II Express Briefs, 2013
2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
A 27mW 2.2dB NF GPS receiver using a capacitive cross-coupled structure in 65nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010