Ji-Hwan Seol
Orcid: 0000-0002-8081-0040
According to our database1,
Ji-Hwan Seol
authored at least 8 papers
between 2013 and 2024.
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Bibliography
2024
A 1.5-μW Fully-Integrated Keyword Spotting SoC in 28-nm CMOS With Skip-RNN and Fast-Settling Analog Frontend for Adaptive Frame Skipping.
IEEE J. Solid State Circuits, January, 2024
2022
A 43 nW, 32 kHz, ±4.2 ppm Piecewise Linear Temperature-Compensated Crystal Oscillator With ΔΣ-Modulated Load Capacitance.
IEEE J. Solid State Circuits, 2022
2021
IEEE J. Solid State Circuits, 2021
A 43nW 32kHz Pulsed Injection TCXO with 4.2ppm Accuracy Using ∆Σ Modulated Load Capacitance.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
2019
Energy-Efficient Motion-Triggered IoT CMOS Image Sensor With Capacitor Array-Assisted Charge-Injection SAR ADC.
IEEE J. Solid State Circuits, 2019
A Reference Oversampling Digital Phase-Locked Loop with -240 dB FOM and -80 dBc Reference Spur.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
Energy-Efficient Low-Noise CMOS Image Sensor with Capacitor Array-Assisted Charge-Injection SAR ADC for Motion-Triggered Low-Power IoT Applications.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2013
An 8Gb/s 0.65mW/Gb/s forwarded-clock receiver using an ILO with dual feedback loop and quadrature injection scheme.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013