Ji Hwan (Paul) Chun

Proceedings of the 17th IEEE European Test Symposium, 2012

2010

A delay measurement method using a shrinking clock signal.

[BibT_eX]

[DOI]

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

A novel characterization technique for high speed I/O mixed signal circuit components using random jitter injection.

[BibT_eX]

[DOI]

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009

A Random Jitter RMS Estimation Technique for BIST Applications.

[BibT_eX]

[DOI]

Proceedings of the Eighteentgh Asian Test Symposium, 2009

2007

Predicting mixed-signal dynamic performance using optimised signature-based alternate test.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2007

2006

Optimized Signature-Based Statistical Alternate Test for Mixed-Signal Performance Parameters.

[BibT_eX]

[DOI]

Proceedings of the 11th European Test Symposium, 2006

2004

Performance Characterization of Mixed-Signal Circuits Using a Ternary Signal Representation.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Quasi-Oscillation Based Test for Improved Prediction of Analog Performance Parameters.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

An efficient linearity test for on-chip high speed ADC and DAC using loop-back.

[BibT_eX]

[DOI]

Hak-soo Yu