Jhilam Jana

Orcid: 0000-0002-4507-2521

According to our database1, Jhilam Jana authored at least 7 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
FPGA implementation of compact and low-power multiplierless architectures for DWT and IDWT.
J. Real Time Image Process., February, 2024

Improved DWT and IDWT architectures for image compression.
Microprocess. Microsystems, 2024

2023
New low power and fast SEC-DAEC and SEC-DAEC-TAEC codes for memories in space application.
Integr., March, 2023

Implementation of Fast and Power Efficient SEC-DAEC and SEC-DAEC-TAEC Codecs on FPGA.
CoRR, 2023

2020
Design of SEC-DED and SEC-DED-DAEC Codes of different lengths.
CoRR, 2020

2019
Fast and Power Efficient SEC-DED and SEC-DED-DAEC Codes in IoT based Wireless Sensor Networks.
Proceedings of the TENCON 2019, 2019

Design and Development of Electronics Pest Repellent Using PIR Sensor and 8051 Micro-Controller.
Proceedings of the Recent Advances in Intelligent Information Systems and Applied Mathematics, 2019


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