Jeyavijayan Rajendran

Prasad Enjeti

IEEE Internet Things J., November, 2024

STATION: State Encoding-Based Attack-Resilient Sequential Obfuscation.

[BibT_eX]

[DOI]

Zhaokun Han

Aneesh Dixit

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2024

DETERRENT: Detecting Trojans Using Reinforcement Learning.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024

(Security) Assertions by Large Language Models.

[BibT_eX]

[DOI]

IEEE Trans. Inf. Forensics Secur., 2024

Fuzzerfly Effect: Hardware Fuzzing for Memory Safety.

[BibT_eX]

[DOI]

IEEE Secur. Priv., 2024

CreativEval: Evaluating Creativity of LLM-Based Hardware Code Generation.

[BibT_eX]

[DOI]

Matthew DeLorenzo

CoRR, 2024

Make Every Move Count: LLM-based High-Quality RTL Code Generation Using MCTS.

[BibT_eX]

[DOI]

Matthew DeLorenzo

Animesh Basak Chowdhury

CoRR, 2024

LLMs for Hardware Security: Boon or Bane?

[BibT_eX]

[DOI]

Proceedings of the 42nd IEEE VLSI Test Symposium, 2024

AttackGNN: Red-Teaming GNNs in Hardware Security Using Reinforcement Learning.

[BibT_eX]

[DOI]

Dileep Kalathil

Proceedings of the 33rd USENIX Security Symposium, 2024

WhisperFuzz: White-Box Fuzzing for Detecting and Locating Timing Vulnerabilities in Processors.

[BibT_eX]

[DOI]

Proceedings of the 33rd USENIX Security Symposium, 2024

Performance Analysis of Zero-Knowledge Proofs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Workload Characterization, 2024

Beyond Random Inputs: A Novel ML-Based Hardware Fuzzing.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

MABFuzz: Multi-Armed Bandit Algorithms for Fuzzing Processors.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Lost and Found in Speculation: Hybrid Speculative Vulnerability Detection.

[BibT_eX]

[DOI]

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

ModSRAM: Algorithm-Hardware Co-Design for Large Number Modular Multiplication in SRAM.

[BibT_eX]

[DOI]

Jonathan Hao-Cheng Ku

Yiran Chen

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023

Securing Cloud FPGAs Against Power Side-Channel Attacks: A Case Study on Iterative AES.

[BibT_eX]

[DOI]

Hao Guo

CoRR, 2023

LLM-assisted Generation of Hardware Assertions.

[BibT_eX]

[DOI]

CoRR, 2023

FuncTeller: How Well Does eFPGA Hide Functionality?

[BibT_eX]

[DOI]

Proceedings of the 32nd USENIX Security Symposium, 2023

HyPFuzz: Formal-Assisted Processor Fuzzing.

[BibT_eX]

[DOI]

Proceedings of the 32nd USENIX Security Symposium, 2023

PSOFuzz: Fuzzing Processors with Particle Swarm Optimization.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

ExploreFault: Identifying Exploitable Fault Models in Block Ciphers with Reinforcement Learning.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

Towards Provably-Secure Analog and Mixed-Signal Locking Against Overproduction.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2022

Vulnerability Assessment of Ciphers To Fault Attacks Using Reinforcement Learning.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2022

Guest Editors' Introduction: Special Issue on 2021 Top Picks in Hardware and Embedded Security.

[BibT_eX]

[DOI]

Srini Devadas

IEEE Des. Test, 2022

TheHuzz: Instruction Fuzzing of Processors Using Golden-Reference Models for Finding Software-Exploitable Vulnerabilities.

[BibT_eX]

[DOI]

Proceedings of the 31st USENIX Security Symposium, 2022

Reinforcement Learning for Hardware Security: Opportunities, Developments, and Challenges.

[BibT_eX]

[DOI]

Hao Guo

Proceedings of the 19th International SoC Design Conference, 2022

Hardware IP Protection against Confidentiality Attacks and Evolving Role of CAD Tool.

[BibT_eX]

[DOI]

Ankur Srivastava

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Trusting the trust anchor: towards detecting cross-layer vulnerabilities with hardware fuzzing.

[BibT_eX]

[DOI]

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

ATTRITION: Attacking Static Hardware Trojan Detection Techniques Using Reinforcement Learning.

[BibT_eX]

[DOI]

Hao Guo

Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 2022

2021

Games, Dollars, Splits: A Game-Theoretic Analysis of Split Manufacturing.

[BibT_eX]

[DOI]

IEEE Trans. Inf. Forensics Secur., 2021

Analog/RF IP Protection: Attack Models, Defense Techniques, and Challenges.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2021

Guest Editors' Introduction: Competing to Secure SoCs.

[BibT_eX]

[DOI]

Siddharth Garg

Daniel E. Holcomb

IEEE Des. Test, 2021

Does logic locking work with EDA tools?

[BibT_eX]

[DOI]

Zhaokun Han

Proceedings of the 30th USENIX Security Symposium, 2021

Organizing The World's Largest Hardware Security Competition: Challenges, Opportunities, and Lessons Learned.

[BibT_eX]

[DOI]

Rahul Kande

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

2020

Breaking Analog Locking Techniques.

[BibT_eX]

[DOI]

Amr Abuellil

IEEE Trans. Very Large Scale Integr. Syst., 2020

Removal Attacks on Logic Locking and Camouflaging Techniques.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2020

Thwarting Replication Attack Against Memristor-Based Neuromorphic Computing System.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Keynote: A Disquisition on Logic Locking.

[BibT_eX]

[DOI]

Abhishek Chakraborty

Yuntao Liu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking.

[BibT_eX]

[DOI]

CoRR, 2020

Security of Cloud FPGAs: A Survey.

[BibT_eX]

[DOI]

Chenglu Jin

CoRR, 2020

Schmitt Trigger-Based Key Provisioning for Locking Analog/RF Integrated Circuits.

[BibT_eX]

[DOI]

S. Y. Lee

Proceedings of the IEEE International Test Conference, 2020

Multi-Objective Strategies for Stripped-Functionality Logic Locking.

[BibT_eX]

[DOI]

Zhaokun Han

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Trustworthy Hardware Design: Combinational Logic Locking Techniques

[BibT_eX]

[DOI]

Springer, ISBN: 978-3-030-15333-5, 2020

2019

Special Session: Countering IP Security threats in Supply chain.

[BibT_eX]

[DOI]

Naghmeh Karimi

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

HardFails: Insights into Software-Exploitable Hardware Bugs.

[BibT_eX]

[DOI]

Proceedings of the 28th USENIX Security Symposium, 2019

Breaking Analog Locking Techniques via Satisfiability Modulo Theories.

[BibT_eX]

[DOI]

Amr Abuellil

Proceedings of the IEEE International Test Conference, 2019

Red Teaming a Multi-Colored Bluetooth Bulb.

[BibT_eX]

[DOI]

Stavros Kalafatis

Proceedings of the 37th IEEE International Conference on Computer Design, 2019

SFLL-HLS: Stripped-Functionality Logic Locking Meets High-Level Synthesis.

[BibT_eX]

[DOI]

Chongzhi Zhao

Proceedings of the International Conference on Computer-Aided Design, 2019

Layout recognition attacks on split manufacturing.

[BibT_eX]

[DOI]

Wenbin Xu

Lang Feng

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018

The Cat and Mouse in Split Manufacturing.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2018

When a Patch is Not Enough - HardFails: Software-Exploitable Hardware Bugs.

[BibT_eX]

[DOI]

CoRR, 2018

Special session: Recent developments in hardware security.

[BibT_eX]

[DOI]

Ro Cammarota

Naghmeh Karimi

Siddharth Garg

Proceedings of the 36th IEEE VLSI Test Symposium, 2018

Towards provably-secure performance locking.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

Testing the Trustworthiness of IC Testing: An Oracle-Less Attack on IC Camouflaging.

[BibT_eX]

[DOI]

IEEE Trans. Inf. Forensics Secur., 2017

Innovative practices session 3C hardware security.

[BibT_eX]

[DOI]

Peilin Song

Suriya Natarajan

Proceedings of the 35th IEEE VLSI Test Symposium, 2017

DFS covert channels on multi-core platforms.

[BibT_eX]

[DOI]

Murugappan Alagappan

Milos Doroslovacki

Guru Venkataramani

Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017

An overview of hardware intellectual property protection.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Front-end-of-line attacks in split manufacturing.

[BibT_eX]

[DOI]

Yujie Wang

Tri Cao

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Making split fabrication synergistically secure and manufacturable.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

TTLock: Tenacious and traceless logic locking.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017

On designing optimal camouflaged layouts.

[BibT_eX]

[DOI]

Thomas Broadfoot

Carl Sechen

Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017

What to Lock?: Functional and Parametric Locking.

[BibT_eX]

[DOI]

Abhrajit Sengupta

Benjamin Carrión Schäfer

Yiorgos Makris

Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

Provably-Secure Logic Locking: From Theory To Practice.

[BibT_eX]

[DOI]

Abhrajit Sengupta

Mohammed Thari Nabeel

Mohammed Ashraf

Proceedings of the 2017 ACM SIGSAC Conference on Computer and Communications Security, 2017

Boolean Circuit Camouflage: Cryptographic Models, Limitations, Provable Results and a Random Oracle Realization.

[BibT_eX]

[DOI]

Giovanni Di Crescenzo

Nasir D. Memon

Proceedings of the 2017 Workshop on Attacks and Solutions in Hardware Security, 2017

Routing perturbation for enhanced security in split manufacturing.

[BibT_eX]

[DOI]

Yujie Wang

Pu Chen

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

Building Trustworthy Systems Using Untrusted Components: A High-Level Synthesis Approach.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2016

On Improving the Security of Logic Locking.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Security Analysis of Anti-SAT.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2016

Supply-Chain Security of Digital Microfluidic Biochips.

[BibT_eX]

[DOI]

Sk Subidh Ali

Mohamed Ibrahim

Krishnendu Chakrabarty

Computer, 2016

Formal Security Verification of Third Party Intellectual Property Cores for Information Leakage.

[BibT_eX]

[DOI]

Arunshankar Muruga Dhandayuthapany

Vivekananda Vedula

Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

Securing pressure measurements using SensorPUFs.

[BibT_eX]

[DOI]

Jack Tang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Hardware-based attacks to compromise the cryptographic security of an election system.

[BibT_eX]

[DOI]

Mohammad-Mahdi Bidmeshki

Gaurav Rajavendra Reddy

Liwei Zhou

Yiorgos Makris

Proceedings of the 34th IEEE International Conference on Computer Design, 2016

CamoPerturb: secure IC camouflaging for minterm protection.

[BibT_eX]

[DOI]

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Security of neuromorphic computing: thwarting learning attacks using memristor's obsolescence effect.

[BibT_eX]

[DOI]

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

SARLock: SAT attack resistant logic locking.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016

Sneak path enabled authentication for memristive crossbar memories.

[BibT_eX]

[DOI]

Md. Badruddoja Majumder

Mesbah Uddin

Proceedings of the 2016 IEEE Asian Hardware-Oriented Security and Trust, 2016

Controlling your control flow graph.

[BibT_eX]

[DOI]

Arun K. Kanuparthi

Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016

Activation of logic encrypted chips: Pre-test or post-test?

[BibT_eX]

[DOI]

Samah Mohamed Saeed

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

The cat and mouse in split manufacturing.

[BibT_eX]

[DOI]

Yujie Wang

Pu Chen

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

Belling the CAD: Toward Security-Centric Electronic System Design.

[BibT_eX]

[DOI]

Aman Ali

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Fault Analysis-Based Logic Encryption.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2015

Improving Tolerance to Variations in Memristor-Based Applications Using Parallel Memristors.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2015

Nano Meets Security: Exploring Nanoelectronic Devices for Security Applications.

[BibT_eX]

[DOI]

Proc. IEEE, 2015

Detecting malicious modifications of data in third-party intellectual property cores.

[BibT_eX]

[DOI]

Vivekananda Vedula

Proceedings of the 52nd Annual Design Automation Conference, 2015

2014

Shielding Heterogeneous MPSoCs From Untrustworthy 3PIPs Through Security- Driven Task Scheduling.

[BibT_eX]

[DOI]

Chen Liu

Chengmo Yang

IEEE Trans. Emerg. Top. Comput., 2014

Regaining Trust in VLSI Design: Design-for-Trust Techniques.

[BibT_eX]

[DOI]

Proc. IEEE, 2014

Hot topic session 9C: Test and fault tolerance for emerging memory technologies.

[BibT_eX]

[DOI]

Suriya Natarajan

Amitava Majumdar

Proceedings of the 32nd IEEE VLSI Test Symposium, 2014

Towards Secure Analog Designs: A Secure Sense Amplifier Using Memristors.

[BibT_eX]

[DOI]

David H. K. Hoe

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

Shielding and securing integrated circuits with sensors.

[BibT_eX]

[DOI]

Davood Shahrjerdi

Siddharth Garg

Farinaz Koushanfar

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

A Red Team/Blue Team Assessment of Functional Analysis Methods for Malicious Circuit Identification.

[BibT_eX]

[DOI]

Adam Waksman

Matthew Suozzo

Simha Sethumadhavan

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013

Securing Processors Against Insider Attacks: A Circuit-Microarchitecture Co-Design Approach.

[BibT_eX]

[DOI]

IEEE Des. Test, 2013

A study on the effectiveness of Trojan detection techniques using a red team blue team approach.

[BibT_eX]

[DOI]

Xuehui Zhang

Kan Xiao

Mohammad Tehranipoor

Proceedings of the 31st IEEE VLSI Test Symposium, 2013

Sneak-path Testing of Memristor-based Memories.

[BibT_eX]

[DOI]

Sachhidh Kannan

Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013

VLSI testing based security metric for IC camouflaging.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Test Conference, 2013

High-level synthesis for security and trust.

[BibT_eX]

[DOI]

Huan Zhang

Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

Hardware security: threat models and metrics.

[BibT_eX]

[DOI]

Masoud Rostami

Farinaz Koushanfar

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Reconciling the IC test and security dichotomy.

[BibT_eX]

[DOI]

Naghmeh Karimi

Proceedings of the 18th IEEE European Test Symposium, 2013

Is split manufacturing secure?

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

Security analysis of integrated circuit camouflaging.

[BibT_eX]

[DOI]

Michael Sam

Proceedings of the 2013 ACM SIGSAC Conference on Computer and Communications Security, 2013

Hardware security strategies exploiting nanoelectronic circuits.

[BibT_eX]

[DOI]

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

Stochastic Gradient Descent Inspired Training Technique for a CMOS/Nano Memristive Trainable Threshold Gate Array.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

An Energy-Efficient Memristive Threshold Logic Circuit.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2012

Leveraging Memristive Systems in the Construction of Digital Logic Circuits.

[BibT_eX]

[DOI]

Robinson E. Pino

Proc. IEEE, 2012

Design Considerations for Multilevel CMOS/Nano Memristive Memory.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2012

Nanoelectronic Solutions for Hardware Security.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2012

Nano-PPUF: A Memristor-Based Security Primitive.

[BibT_eX]

[DOI]

Miodrag Potkonjak

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

Engineering crossbar based emerging memory technologies.

[BibT_eX]

[DOI]

Sachhidh Kannan

Proceedings of the 30th International IEEE Conference on Computer Design, 2012

Logic encryption: A fault analysis perspective.

[BibT_eX]

[DOI]

Youngok K. Pino

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Security analysis of logic obfuscation.

[BibT_eX]

[DOI]

Youngok K. Pino

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

Trustworthy Hardware: Trojan Detection and Design-for-Trust Challenges.

[BibT_eX]

[DOI]

Kurt Rosenfeld

Computer, 2011

Design and analysis of ring oscillator based Design-for-Trust technique.

[BibT_eX]

[DOI]

Vinayaka Jyothi

Proceedings of the 29th IEEE VLSI Test Symposium, 2011

An Approach to Tolerate Process Related Variations in Memristor-Based Applications.

[BibT_eX]

[DOI]

Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

Parallel memristors: Improving variation tolerance in memristive digital circuits.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Blue team red team approach to hardware trust assessment.

[BibT_eX]

[DOI]

Vinayaka Jyothi

Proceedings of the IEEE 29th International Conference on Computer Design, 2011

2010

Trustworthy Hardware: Identifying and Classifying Hardware Trojans.

[BibT_eX]

[DOI]

Kurt Rosenfeld

Mohammad Tehranipoor

Computer, 2010

Memristor based programmable threshold logic array.

[BibT_eX]

[DOI]

Proceedings of the 2010 IEEE/ACM International Symposium on Nanoscale Architectures, 2010

Towards a comprehensive and systematic classification of hardware Trojans.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

SLICED: Slide-based Concurrent Error Detection Technique for Symmetric Block Ciphers.

[BibT_eX]

[DOI]

Hetal Borad

Shyam Mantravadi