Jesse Moody
Orcid: 0000-0003-4541-9668
According to our database1,
Jesse Moody
authored at least 8 papers
between 2017 and 2023.
Collaborative distances:
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Bibliography
2023
A 0.2-2 GHz Time-Interleaved Multistage Switched-Capacitor Delay Element Achieving 2.55-448.6 ns Programmable Delay Range and 330 ns/mm<sup>2</sup> Area Efficiency.
IEEE J. Solid State Circuits, 2023
2020
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
A- 108dBm Sensitivity, -28dB SIR, 130nW to 41µW, Digitally Reconfigurable Bit-Level Duty-Cycled Wakeup and Data Receiver.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020
2019
IEEE J. Solid State Circuits, 2019
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
2018
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the 2017 IEEE SENSORS, Glasgow, United Kingdom, October 29, 2017