Jerry C. Kao

According to our database, Jerry C. Kao authored at least 7 papers between 2007 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2012

Energy-Efficient Low-Latency 600 MHz FIR With High-Overdrive Charge-Recovery Logic.

Jerry C. Kao, Wei-Hsiang Ma, Visvesh S. Sathe, Marios C. Papaefthymiou

IEEE Trans. Very Large Scale Integr. Syst., 2012

2011

A 5.5GS/s 28mW 5-bit flash ADC with resonant clock distribution.

Wei-Hsiang Ma, Jerry C. Kao, Marios C. Papaefthymiou

Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010

187 MHz Subthreshold-Supply Charge-Recovery FIR.

Wei-Hsiang Ma, Jerry C. Kao, Visvesh S. Sathe, Marios C. Papaefthymiou

IEEE J. Solid State Circuits, 2010

2009

A charge-recovery 600MHz FIR filter with 1.5-cycle latency overhead.

Jerry C. Kao, Wei-Hsiang Ma, Visvesh S. Sathe, Marios C. Papaefthymiou

Proceedings of the 35th European Solid-State Circuits Conference, 2009

A resonant-clock 200MHz ARM926EJ-STM microcontroller.

Alexander T. Ishii, Jerry C. Kao, Visvesh S. Sathe, Marios C. Papaefthymiou

Proceedings of the 35th European Solid-State Circuits Conference, 2009

2008

Resonant-Clock Latch-Based Design.

Visvesh S. Sathe, Jerry C. Kao, Marios C. Papaefthymiou

IEEE J. Solid State Circuits, 2008

2007

A 0.8-1.2GHz Single-Phase Resonant-Clocked FIR Filter with Level-Sensitive Latches.

Visvesh S. Sathe, Jerry C. Kao, Marios C. Papaefthymiou

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007