Jerrin Pathrose
According to our database1,
Jerrin Pathrose
authored at least 11 papers
between 2014 and 2019.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2019
IJTAG Compatible Delay-line based Voltage Embedded Instrument with One Clock-cycle Conversion Time.
Proceedings of the IEEE Latin American Test Symposium, 2019
IJTAG Compatible Timing Monitor with Robust Self-Calibration for Environmental and Aging Variation.
Proceedings of the 24th IEEE European Test Symposium, 2019
Analog Test Interface for IEEE 1687 Employing Split SAR Architecture to Support Embedded Instrument Dependability Applications.
Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019
2018
Proceedings of the 12th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2018
Proceedings of the 19th IEEE Latin-American Test Symposium, 2018
Proceedings of the IEEE Industrial Cyber-Physical Systems, 2018
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018
2017
Applying IJTAG-compatible embedded instruments for lifetime enhancement of analog front-ends of cyber-physical systems.
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017
2016
Int. J. Circuit Theory Appl., 2016
2015
A Time-Domain Band-Gap Temperature Sensor in SOI CMOS for High-Temperature Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2015
2014
IEEE Trans. Circuits Syst. II Express Briefs, 2014