Jérôme Mitard

According to our database, Jérôme Mitard authored at least 19 papers between 2007 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Monolithic Complementary Field Effect Transistors (CFET) Demonstrated using Middle Dielectric Isolation and Stacked Contacts.

Steven Demuynck, Victor Vega-Gonzalez, C. Toledo de Carvalho Cavalcante, L. Petersen Barbosa Lima, K. Stiers, C. Sheng, A. Vandooren, M. Hosseini, X. Zhou, Hans Mertens, Thomas Chiarella, Jürgen Bömmels, Roger Loo, E. Rosseel, Clement Porret, Y. Shimura, A. Akula, G. Mannaert, S. Choudhury, V. Brissonneau, E. Dupuy, T. Sarkar, Nathali Franchina-Vergel, A. Peter, Nicolas Jourdan, J. P. Soulie, Kevin Vandersmissen, F. Sebaai, P. Puttarame Gowda, K. Lai, A. Mingardi, S. Sumar Sarkar, K. D'Have, B. T. Chan, A. Sepulveda Marquez, R. Langer, I. Gyo Koo, E. Altamirano Sanchez, Katia Devriendt, P. Rincon Delgadillo, F. Lazzarino, Jérôme Mitard, J. Geypen, E. Grieten, D. Batuk, Y.-F. Chen, F. Verbeek, F. Holsteyns, S. Subramanian, N. Horiguchi, S. Biesemans

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023

Automatic Prediction of Metal-Oxide-Semiconductor Field-Effect Transistor Threshold Voltage Using Machine Learning Algorithm.

Seoyeon Choi, Dong Geun Park, Min Jung Kim, Seain Bang, Jungchun Kim, Seunghee Jin, Ki Seok Huh, Donghyun Kim, Jérôme Mitard, Cheol E. Han, Jae Woo Lee

Adv. Intell. Syst., January, 2023

Nanosheet-based Complementary Field-Effect Transistors (CFETs) at 48nm Gate Pitch, and Middle Dielectric Isolation to enable CFET Inner Spacer Formation and Multi-Vt Patterning.

Hans Mertens, M. Hosseini, Thomas Chiarella, D. Zhou, S. Wang, G. Mannaert, E. Dupuy, D. Radisic, Z. Tao, Yusuke Oniki, Andriy Hikavyy, R. Rosseel, A. Mingardi, S. Choudhury, P. Puttarame Gowda, F. Sebaai, A. Peter, Kevin Vandersmissen, J. P. Soulie, An De Keersgieter, L. Petersen Barbosa Lima, C. Cavalcante, D. Batuk, G. T. Martinez, J. Geypen, F. Seidel, K. Paulussen, P. Favia, Jürgen Bömmels, Roger Loo, P. Wong, A. Sepulveda Marquez, B. T. Chan, Jérôme Mitard, S. Subramanian, S. Demuynck, E. Dentoni Litta, N. Horiguchi, S. Samavedam, S. Biesemans

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Molybdenum Nitride as a Scalable and Thermally Stable pWFM for CFET.

Hiroaki Arimura, S. Brus, Jacopo Franco, Yusuke Oniki, A. Vandooren, T. Conard, B. T. Chan, B. Kannan, M. Samiee, W. Li, P. Deminskyi, E. Shero, J. Bakke, Nicolas Jourdan, G. Alessio Verni, J. W. Maes, M. Givens, Lars-Åke Ragnarsson, Jérôme Mitard, E. Dentoni Litta, N. Horiguchi

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2021

Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies.

Gerhard Rzepa, Markus Karner, Oskar Baumgartner, Georg Strof, Franz Schanovsky, Ferdinand Mitterbauer, Christian Kernstock, Hui-Wen Karner, Pieter Weckx, Geert Hellings, Dieter Claes, Zhicheng Wu, Yang Xiang, Thomas Chiarella, Bertrand Parvais, Jérôme Mitard, Jacopo Franco, Ben Kaczer, Dimitri Linten, Zlatan Stanojevic

Proceedings of the IEEE International Reliability Physics Symposium, 2021

Enhanced data integrity of In-Ga-Zn-Oxide based Capacitor-less 2T memory for DRAM applications.

Hyungrock Oh, Attilio Belmonte, Manu Perumkunnil, Jérôme Mitard, Nouredine Rassoul, Gabriele Luca Donadio, Romain Delhougne, Arnaud Furnémont, Gouri Sankar Kar, Wim Dehaene

Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

Detecting Transistor Defects in Medical Systems Using a Multi Model Ensemble of Convolutional Neural Networks.

Hüsnü Murat Koçak, Ahmet Teoman Naskali, Özgün Pinarer, Jérôme Mitard

Proceedings of the 2021 IEEE International Conference on Big Data (Big Data), 2021

2019

CDM-Time Domain Turn-on Transient of ESD Diodes in Bulk FinFET and GAA NW Technologies.

Shih-Hung Chen, Dimitri Linten, Geert Hellings, Marko Simicic, Ben Kaczer, Thomas Chiarella, Hans Mertens, Jérôme Mitard, Anda Mocuta, N. Horiguchi

Proceedings of the IEEE International Reliability Physics Symposium, 2019

2018

Scalability comparison between raised- and embedded-SiGe source/drain structures for Si_0.55Ge_0.45 implant free quantum well pFET.

Shimpei Yamaguchi, Liesbeth Witters, Jérôme Mitard, Geert Eneman, Geert Hellings, Andriy Hikavyy, Roger Loo, Naoto Horiguchi

Microelectron. Reliab., 2018

Scaling CMOS beyond Si FinFET: an analog/RF perspective.

Bertrand Parvais, Geert Hellings, Marko Simicic, Pieter Weckx, Jérôme Mitard, Doyoung Jang, V. Deshpande, B. van Liempc, Anabela Veloso, A. Vandooren, Niamh Waldron, Piet Wambacq, Nadine Collaert, Diederik Verkest

Proceedings of the 48th European Solid-State Device Research Conference, 2018

2017

Isolation of nanowires made on bulk wafers by ground plane doping.

Romain Ritzenthaler, Hans Mertens, An De Keersgieter, Jérôme Mitard, Dan Mocuta, N. Horiguchi

Proceedings of the 47th European Solid-State Device Research Conference, 2017

2016

Beyond-Si materials and devices for more Moore and more than Moore applications.

Nadine Collaert, AliReza Alian, Hiroaki Arimura, Geert Boccardi, Geert Eneman, Jacopo Franco, Tsvetan Ivanov, Dennis Lin, Jérôme Mitard, S. Ramesh, R. Rooyackers, Marc Schaekers, A. Sibaya-Hernandez, S. Sioncke, Quentin Smets, Abhitosh Vais, A. Vandooren, Anabela Veloso, Anne S. Verhulst, Devin Verreck, Niamh Waldron, Amey Walke, Liesbeth Witters, H. Yu, X. Zhou, Aaron Voon-Yew Thean

Proceedings of the International Conference on IC Design and Technology, 2016

Towards high performance sub-10nm finW bulk FinFET technology.

Thomas Chiarella, Stefan Kubicek, E. Rosseel, Romain Ritzenthaler, Andriy Hikavyy, P. Eyben, An De Keersgieter, L.-Å. Ragnarsson, M.-S. Kim, S.-A. Chew, Tom Schram, S. Demuynck, Miroslav Cupák, Luc Rijnders, Morin Dehan, Naoto Horiguchi, Jérôme Mitard, Dan Mocuta, Anda Mocuta, Aaron Voon-Yew Thean

Proceedings of the 46th European Solid-State Device Research Conference, 2016

2012

Buried Silicon-Germanium pMOSFETs: Experimental Analysis in VLSI Logic Circuits Under Aggressive Voltage Scaling.

Felice Crupi, Massimo Alioto, Jacopo Franco, Paolo Magnone, Ben Kaczer, Guido Groeseneken, Jérôme Mitard, Liesbeth Witters, Thomas Y. Hoffmann

IEEE Trans. Very Large Scale Integr. Syst., 2012

Superior reliability and reduced Time-Dependent variability in high-mobility SiGe channel pMOSFETs for VLSI logic applications.

Jacopo Franco, Ben Kaczer, Jérôme Mitard, Maria Toledano-Luque, Felice Crupi, Geert Eneman, Ph. J. Rousse, Tibor Grasser, M. Cho, Thomas Kauerauf, Liesbeth Witters, Geert Hellings, L.-Å. Ragnarsson, Naoto Horiguchi, Marc M. Heyns, Guido Groeseneken

Proceedings of the IEEE International Conference on IC Design & Technology, 2012

Low-frequency noise assessment of the transport mechanisms in SiGe channel bulk FinFETs.

Tommaso Romeo, Luigi Pantisano, Eddy Simoen, Raymond Krom, Mitsuhiro Togo, N. Horiguchi, Jérôme Mitard, Aaron Thean, Guido Groeseneken, Cor Claeys, Felice Crupi

Proceedings of the 2012 European Solid-State Device Research Conference, 2012

Low-power DRAM-compatible Replacement Gate High-k/Metal Gate stacks.

Romain Ritzenthaler, Tom Schram, Erik Bury, Jérôme Mitard, L.-Å. Ragnarsson, Guido Groeseneken, N. Horiguchi, Aaron Thean, Alessio Spessot, Christian Caillat, V. Srividya, Pierre Fazan

Proceedings of the 2012 European Solid-State Device Research Conference, 2012

2011

Experimental analysis of buried SiGe pMOSFETs from the perspective of aggressive voltage scaling.

Felice Crupi, Massimo Alioto, Jacopo Franco, Paolo Magnone, Ben Kaczer, Guido Groeseneken, Jérôme Mitard, Liesbeth Witters, Thomas Y. Hoffmann

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2007

Initial and PBTI-induced traps and charges in Hf-based oxides/TiN stacks.

Gilles Reimbold, Jérôme Mitard, Xavier Garros, Charles Leroux, Gérard Ghibaudo, François Martin

Microelectron. Reliab., 2007