Jeremy Blackstone

According to our database1, Jeremy Blackstone authored at least 9 papers between 2016 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
Using Blinking to Mitigate Passive Side Channel Attacks and Fault Attacks.
PhD thesis, 2021

iSTELLAR: intermittent Signature aTtenuation Embedded CRYPTO with Low-Level metAl Routing.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

2020
Memory-Based High-Level Synthesis Optimizations Security Exploration on the Power Side-Channel.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

A Unified Model for Gate Level Propagation Analysis.
CoRR, 2020

2019
Holistic Power Side-Channel Leakage Assessment: Towards a Robust Multidimensional Metric.
Proceedings of the International Conference on Computer-Aided Design, 2019

2018
Symbolic execution based test-patterns generation algorithm for hardware Trojan detection.
Comput. Secur., 2018

Examining the consequences of high-level synthesis optimizations on power side-channel.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Why you should care about don't cares: Exploiting internal don't care conditions for hardware Trojans.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

2016
Tinker: Generating Custom Memory Architectures for Altera's OpenCL Compiler.
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016


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