Jere Rusanen
Orcid: 0000-0002-2290-5156
According to our database1,
Jere Rusanen
authored at least 5 papers
between 2019 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
2019
2020
2021
2022
2023
2024
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Bibliography
2024
Improving a Ka-Band Integrated Balanced Power Amplifier Performance by Compensating Quadrature Hybrid Mismatch Effects.
IEEE Trans. Very Large Scale Integr. Syst., December, 2024
2023
A Low-Power Push-Push D-Band VCO with 11.6% FTR utilizing Back-gate Control in 22nm FDSOI.
Proceedings of the IEEE Radio and Wireless Symposium, 2023
Compensating Quadrature Hybrid Mismatch Effects in Integrated Balanced Power Amplifier.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023
2021
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021
2019
Ka-Band Stacked Power Amplifier on 22 nm CMOS FDSOI Technology Utilizing Back-Gate Bias for Linearity Improvement.
Proceedings of the 2019 IEEE Nordic Circuits and Systems Conference, 2019