Jeongsup Lee

Orcid: 0000-0002-5053-9309

According to our database1, Jeongsup Lee authored at least 8 papers between 2018 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Design Techniques of Integrated Power Management Circuits for Low Power Edge Devices.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2020
A Self-Tuning IoT Processor Using Leakage-Ratio Measurement for Energy-Optimal Operation.
IEEE J. Solid State Circuits, 2020

Fully-Autonomous SoC Synthesis Using Customizable Cell-Based Analog and Mixed-Signal Circuits Generation.
Proceedings of the VLSI-SoC: Design Trends, 2020

AµProcessor Layer for mm-Scale Die-Stacked Sensing Platforms Featuring Ultra-Low Power Sleep Mode at 125°C.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

2019
A 6.4pJ/Cycle Self-Tuning Cortex-M0 IoT Processor Based on Leakage-Ratio Measurement for Energy-Optimal Operation Across Wide-Range PVT Variation.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

Toward an Open-Source Digital Flow: First Learnings from the OpenROAD Project.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018
An Adaptive Body-Biaslna SoC Using in Situ Slack Monitoring for Runtime Replica Calibration.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

A 2.2 NEF Neural-Recording Amplifier Using Discrete-Time Parametric Amplification.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018


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