Jeongseok Chae

According to our database, Jeongseok Chae authored at least 6 papers between 2008 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2012

A 12-bit 7 µW/channel 1 kHz/channel incremental ADC for biosensor interface circuits.

Chia-Hung Chen, Joseph Crop, Jeongseok Chae, Patrick Chiang, Gabor C. Temes

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

A double-sampled low-distortion cascade ΔΣ modulator with an adder/integrator for WLAN application.

Sanghyeon Lee, Jeongseok Chae, Mitsuru Aniya, Seiji Takeuchi, Koichi Hamashita, Pavan Kumar Hanumolu, Gabor C. Temes

Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010

A 63 dB 16 mW 20 MHz BW double-sampled ΔΣs analog-to-digital converter with an embedded-adder quantizer.

Jeongseok Chae, Sanghyeon Lee, Mitsuru Aniya, Seiji Takeuchi, Koichi Hamashita, Pavan Kumar Hanumolu, Gabor C. Temes

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2008

A Noise-Coupled Time-Interleaved Delta-Sigma ADC With 4.2 MHz Bandwidth, -98 dB THD, and 79 dB SNDR.

Kyehyung Lee, Jeongseok Chae, Mitsuru Aniya, Koichi Hamashita, Kaoru Takasuka, Seiji Takeuchi, Gabor C. Temes

IEEE J. Solid State Circuits, 2008

A Noise-Coupled Time-Interleaved ΔΣ ADC with 4.2MHz BW, -98dB THD, and 79dB SNDR.

Kyehyung Lee, Jeongseok Chae, Mitsuru Aniya, Koichi Hamashita, Kaoru Takasuka, Seiji Takeuchi, Gabor C. Temes

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Efficient fully-floating double-sampling integrator for DeltaSigma ADCs.

Kyehyung Lee, Jeongseok Chae, Gabor C. Temes

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008