Jeongmyeong Kim
Orcid: 0000-0002-6498-1309
According to our database1,
Jeongmyeong Kim
authored at least 4 papers
between 2021 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
2021
2022
2023
2024
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
2024
A High-Resolution Pipelined-SAR ADC Using Cyclically Charged Floating Inverter Amplifier.
IEEE J. Solid State Circuits, October, 2024
A 0.6-1 V $\mathrm{V}_{\text{IN}}$ Soft-Switching Low Dropout Regulator with 31.3 A/mm<sup>2</sup> Current Density, 99.99% Current Efficiency, and 2.04 fs FoM.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
2023
A 74.0 dB-SNDR 175.4 dB-FoM Pipelined-SAR ADC Using a Cyclically Charged Floating Inverter Amplifier.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
2021
An On-Chip Dual-Output Switched-Capacitor DC- DC Converter with Fine-Grained Output Control.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021