Jeonggyu Yang

According to our database, Jeonggyu Yang authored at least 6 papers between 2020 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

Ternary Toward Binary: Circuit-Level Implementation of Ternary Logic Using Depletion-Mode and Conventional MOSFETs.

Hyundong Lee, Seonghoon Kim, Jongbeom Kim, Jaehoon Jeong, Jeonggyu Yang, Taigon Song

IEEE Access, 2025

2023

NS3K: A 3-nm Nanosheet FET Standard Cell Library Development and its Impact.

Taehak Kim, Jaehoon Jeong, Seungmin Woo, Jeonggyu Yang, Hyunwoo Kim, Ahyeon Nam, Changdong Lee, Jinmin Seo, Minji Kim, Siwon Ryu, Yoonju Oh, Taigon Song

IEEE Trans. Very Large Scale Integr. Syst., February, 2023

2022

Circuit-Level Exploration of Ternary Logic Using Memristors and MOSFETs.

Jeonggyu Yang, Hyundong Lee, Jaehoon Jeong, Taehak Kim, Sin-Hyung Lee, Taigon Song

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

2021

A Practical Implementation of the Ternary Logic Using Memristors and MOSFETs.

Jeonggyu Yang, Hyundong Lee, Jaehoon Jeong, Taehak Kim, Sin-Hyung Lee, Taigon Song

Proceedings of the 51st IEEE International Symposium on Multiple-Valued Logic, 2021

NS3K: A 3nm Nanosheet FET Library for VLSI Prediction in Advanced Nodes.

Taehak Kim, Jaehoon Jeong, Seungmin Woo, Jeonggyu Yang, Hyunwoo Kim, Ahyeon Nam, Changdong Lee, Jinmin Seo, Minji Kim, Siwon Ryu, Yoonju Oh, Taigon Song

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

A Prediction Scheme in Spiking Neural Network (SNN) Hardware for Ultra-low Power Consumption.

Jeonggyu Yang, Taigon Song

Proceedings of the International SoC Design Conference, 2020