Jeonggoo Song

Orcid: 0000-0002-9591-1557

According to our database1, Jeonggoo Song authored at least 8 papers between 2016 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
A 10-b 600-MS/s 2-Way Time-Interleaved SAR ADC With Mean Absolute Deviation-Based Background Timing-Skew Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018
A 10-b 600-MS/s 2-way time-interleaved SAR ADC with mean absolute deviation based background timing-skew calibration.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017
A 0.95-mW 6-b 700-MS/s Single-Channel Loop-Unrolled SAR ADC in 40-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

A 10-b 800-MS/s Time-Interleaved SAR ADC With Fast Variance-Based Timing-Skew Calibration.
IEEE J. Solid State Circuits, 2017

A 10-b 2b/cycle 300MS/s SAR ADC with a single differential DAC in 40nm CMOS.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

A 1.5fJ/conv-step 10b 100kS/s SAR ADC with gain-boosted dynamic comparator.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2016
A 10-b 750µW 200MS/s fully dynamic single-channel SAR ADC in 40nm CMOS.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

A 10-b 800MS/s time-interleaved SAR ADC with fast timing-skew calibration.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016


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