Jeongbin Kim

Orcid: 0000-0002-5950-0056

Affiliations:
  • SK hynix inc.
  • Yonsei University, Department of Electrical and Electronic Engineering, Seoul, South Korea


According to our database1, Jeongbin Kim authored at least 9 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
SK Hynix AI-Specific Computing Memory Solution: From AiM Device to Heterogeneous AiMX-xPU System for Comprehensive LLM Inference.
Proceedings of the 36th IEEE Hot Chips Symposium, 2024

IANUS: Integrated Accelerator based on NPU-PIM Unified Memory System.
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023

2022
STT-MRAM-Based Multicontext FPGA for Multithreading Computing Environment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022


2019
A Locality-Aware Compression Scheme for Highly Reliable Embedded Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2018
CAD Tool Flow for Variation-Tolerant Non-Volatile STT-MRAM LUT based FPGA.
Proceedings of the 7th International Conference on Software and Computer Applications, 2018

2017
Timing window wiper: A new scheme for reducing refresh power of DRAM.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
FPGA power estimation simulator for dynamic input data.
Proceedings of the International SoC Design Conference, 2016


  Loading...