Jeong-Taek Kong

According to our database¹, Jeong-Taek Kong authored at least 32 papers between 1989 and 2012.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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PhD thesis

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On csauthors.net:

Bibliography

2012

Low-power dual-supply clock networks with clock gating and frequency doubling.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2012

2007

Roundtable: Design and CAD Challenges for Leading-Edge Multimedia Designs.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2007

Tipping Point for New Design Technologies: DFM, Low Power and ESL.

[BibT_eX]

[DOI]

Jeong-Taek Kong

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

SilcVerify: An Efficient Substrate Coupling Noise Simulation Tool for High-Speed & Nano-Scaled Memory Design.

[BibT_eX]

[DOI]

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

2006

Sensing Margin Analysis of MLC Flash Memories Using a Novel Unified Statistical Model.

[BibT_eX]

[DOI]

Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

Runtime distribution-aware dynamic voltage scaling.

[BibT_eX]

[DOI]

Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

A systematic IP and bus subsystem modeling for platform-based system design.

[BibT_eX]

[DOI]

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Design challenges for next-generation multimedia, game and entertainment platforms.

[BibT_eX]

[DOI]

Proceedings of the 43rd Design Automation Conference, 2006

Creation and utilization of a virtual platform for embedded software optimization: : an industrial case study.

[BibT_eX]

[DOI]

Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

PowerV<i>i</i>P: Soc power estimation framework at transaction level.

[BibT_eX]

[DOI]

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005

Analysis for Complex Power Distribution Networks Considering Densely Populated Vias.

[BibT_eX]

[DOI]

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

A Fast Lithography Verification Framework for Litho-Friendly Layout Design.

[BibT_eX]

[DOI]

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

SoC in Nanoera: Challenges and Endless Possibility.

[BibT_eX]

[DOI]

Jeong-Taek Kong

Proceedings of the 2005 Design, 2005

Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture.

[BibT_eX]

[DOI]

Proceedings of the 2005 Design, 2005

2004

CAD for nanometer silicon design challenges and success.

[BibT_eX]

[DOI]

Jeong-Taek Kong

IEEE Trans. Very Large Scale Integr. Syst., 2004

A Variable Reduction Technique for the Analysis of Ultra Large-Scale Power Distribution Networks.

[BibT_eX]

[DOI]

Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design.

[BibT_eX]

[DOI]

Proceedings of the 2004 Design, 2004

2003

Elimination of false aggressors using the functional relationship for full-chip crosstalk analysis.

[BibT_eX]

[DOI]

Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

Investigation of the capacitance deviation due to metal-fills and the effective interconnect geometry modeling.

[BibT_eX]

[DOI]

Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

An MTCMOS design methodology and its application to mobile computing.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

2002

Characterizing the Current Degradation of Abnormally Structured MOS Transistors Using a 3D Poisson Solver.

[BibT_eX]

[DOI]

Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

A Hybrid PPC Method Based on the Empirical Etch Model for the 0.14µm DRAM Generation and Beyond.

[BibT_eX]

[DOI]

Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

2001

Performance Improvement for High Speed Devices Using E-tests and the SPICE Model.

[BibT_eX]

[DOI]

Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001

2000

An Efficient Rule-Based OPC Approach Using a DRC Tool for 0.18mum ASIC.

[BibT_eX]

[DOI]

Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

Three Dimensional Analysis of Thermal Degradation Effects in FDSOI MOSFET's.

[BibT_eX]

[DOI]

Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

S-TFT: an analytical model of polysilicon thin-film transistors for circuit simulation.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999

Dynamic power estimation using the probabilistic contribution measure (PCM).

[BibT_eX]

[DOI]

Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999

1997

An efficient statistical analysis methodology and its application to high-density DRAMs.

[BibT_eX]

[DOI]

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

1995

Methods to improve digital MOS macromodel accuracy.

[BibT_eX]

[DOI]

Jeong-Taek Kong

David Overhauser

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Combining RC-Interconnect Effects with Nonlinear MOS Macromodels.

[BibT_eX]

[DOI]

Jeong-Taek Kong

David Overhauser

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

Improving Digital MOS Macromodel Accuracy.

[BibT_eX]

[DOI]

Jeong-Taek Kong

Syed Zakir Hussain

David Overhauser

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1989

A table look-up model using a 3-D isoparametric shape function with improved convergency.

[BibT_eX]

[DOI]

Dae-Hyung Cho

Tae-Han Kim

Jeong-Taek Kong

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

Jeong-Taek Kong

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