Jeong-Ho Woo
According to our database1,
Jeong-Ho Woo
authored at least 20 papers
between 2005 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
Proceedings of the SIGGRAPH Asia 2024 Posters, SA 2024, Tokyo, Japan, December 3-6, 2024, 2024
Proceedings of the SIGGRAPH Asia 2024 Posters, SA 2024, Tokyo, Japan, December 3-6, 2024, 2024
Proceedings of the SIGGRAPH Asia 2024 Posters, SA 2024, Tokyo, Japan, December 3-6, 2024, 2024
Proceedings of the 21st International SoC Design Conference, 2024
2016
Simple half frame forwarding (HFF-S): frame-rate up conversion for tiled rendering GPU.
Proceedings of the SIGGRAPH ASIA 2016, Macao, December 5-8, 2016 - Posters, 2016
Proceedings of the SIGGRAPH ASIA 2016, Macao, December 5-8, 2016 - Posters, 2016
2013
A 320 mW 342 GOPS Real-Time Dynamic Object Recognition Processor for HD 720p Video Streams.
IEEE J. Solid State Circuits, 2013
2012
IEEE Micro, 2012
2009
A 152-mW Mobile Multimedia SoC With Fully Programmable 3-D Graphics and MPEG4/H.264/JPEG.
IEEE Trans. Very Large Scale Integr. Syst., 2009
IEEE Computer Graphics and Applications, 2009
A 201.4GOPS 496mW real-time multi-object recognition processor with bio-inspired neural perception engine.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
2008
A 195 mW, 9.1 MVertices/s Fully Programmable 3-D Graphics Processor for Low-Power Mobile Devices.
IEEE J. Solid State Circuits, 2008
A 195 mW/152 mW Mobile Multimedia SoC With Fully Programmable 3-D Graphics and MPEG4/H.264/JPEG.
IEEE J. Solid State Circuits, 2008
A 125GOPS 583mW Network-on-Chip Based Parallel Processor with Bio-inspired Visual-Attention Engine.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2007
A low power multimedia SoC with fully programmable 3D graphics and MPEG4/H.264/JPEG for mobile devices.
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007
2006
A 155-mW 50-m vertices/s graphics processor with fixed-point programmable vertex shader for mobile applications.
IEEE J. Solid State Circuits, 2006
A 231-MHz, 2.18-mW 32-bit Logarithmic Arithmetic Unit for Fixed-Point 3-D Graphics System.
IEEE J. Solid State Circuits, 2006
Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, 2006
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006
2005
A fixed-point multimedia coprocessor with 50Mvertices/s programmable SIMD vertex shader for mobile applications.
Proceedings of the 31st European Solid-State Circuits Conference, 2005