Jens Spinner

According to our database, Jens Spinner authored at least 14 papers between 2012 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

Channel Coding for Flash Memories.

Jens Spinner

PhD thesis, 2019

2018

Soft input decoder for high-rate generalised concatenated codes.

Jens Spinner, Daniel Rohweder, Jürgen Freudenberger

IET Circuits Devices Syst., 2018

2017

A decoder with soft decoding capability for high-rate generalized concatenated codes with applications in non-volatile flash memories.

Jens Spinner, Jürgen Freudenberger

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

2016

A Soft Input Decoding Algorithm for Generalized Concatenated Codes.

Jens Spinner, Jürgen Freudenberger, Sergo Shavgulidze

IEEE Trans. Commun., 2016

2015

Decoder architecture for generalised concatenated codes.

Jens Spinner, Jürgen Freudenberger

IET Circuits Devices Syst., 2015

An efficient hardware implementation of sequential stack decoding of binary block codes.

Jürgen Freudenberger, Thomas Wegmann, Jens Spinner

Proceedings of the IEEE 5th International Conference on Consumer Electronics - Berlin, 2015

2014

A Configurable Bose-Chaudhuri-Hocquenghem codec Architecture for Flash controller Applications.

Jürgen Freudenberger, Jens Spinner

J. Circuits Syst. Comput., 2014

Set partitioning of Gaussian integer constellations and its application to two-dimensional interleaving.

Jürgen Freudenberger, Jens Spinner, Sergo Shavgulidze

IET Commun., 2014

Design and Implementation of a Pipelined Decoder for Generalized Concatenated Codes Format.

Jens Spinner, Jürgen Freudenberger

Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014

Set partitioning of Gaussian integer constellations and its application to two-dimensional interleaver design.

Jürgen Freudenberger, Jens Spinner, Sergo Shavgulidze

Proceedings of the IEEE 11th International Multi-Conference on Systems, Signals & Devices, 2014

Generalized concatenated codes for correcting two-dimensional clusters of errors and independent errors.

Jürgen Freudenberger, Jens Spinner, Sergo Shavgulidze

Proceedings of the IEEE 11th International Multi-Conference on Systems, Signals & Devices, 2014

2013

A BCH decoding architecture with mixed parallelization degrees for flash controller applications.

Jens Spinner, Jürgen Freudenberger, Christoph Baumhof, Axel Mehnert, Richard Willems

Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013

2012

Mixed serial/parallel hardware implementation of the Berlekamp-Massey algorithm for BCH decoding in Flash controller applications.

Jürgen Freudenberger, Jens Spinner

Proceedings of the International Symposium on Signals, Systems, and Electronics, 2012

Concatenated code constructions for error correction in non-volatile memories.

Jürgen Freudenberger, Uwe Kaiser, Jens Spinner

Proceedings of the International Symposium on Signals, Systems, and Electronics, 2012