Jens Franzen

According to our database1, Jens Franzen authored at least 5 papers between 1990 and 1995.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

1995
The LISA design environment for the synthesis of array processors including memories for the data transfer and fault tolerance by reconfiguration and coding techniques.
J. VLSI Signal Process., 1995

1994
Einsatz von Fehlertoleranztechniken in VLSI-Schaltkreisen der digitalen Signalverarbeitung.
PhD thesis, 1994

1993
A design method for on-line reconfigurable array processors.
J. VLSI Signal Process., 1993

A Fault-tolerant DCT-Architecture Based on Distributed Arithmetic.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1990
Design of run-time fault-tolerant arrays of self-checking processing elements.
Proceedings of the Application Specific Array Processors, 1990


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