Jens Brandenburg
Orcid: 0009-0000-7557-199X
According to our database1,
Jens Brandenburg
authored at least 25 papers
between 2010 and 2024.
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Bibliography
2024
Int. J. Semantic Comput., June, 2024
CoRR, 2024
Proceedings of the Picture Coding Symposium, 2024
Proceedings of the 15th ACM Multimedia Systems Conference, 2024
Proceedings of the 3rd Mile-High Video Conference, 2024
Proceedings of the IEEE International Conference on Multimedia and Expo, 2024
2023
A Constrained Variable Bit Rate (CVBR) Algorithm for VVenC, an Open VVC Encoder Implementation.
Proceedings of the IEEE International Conference on Visual Communications and Image Processing, 2023
2022
IEEE Trans. Consumer Electron., 2022
A Scene Change and Noise Aware Rate Control Method for VVenC, An Open VVC Encoder Implementation.
Proceedings of the Picture Coding Symposium, 2022
Efficient Multi-Threading Strategies in VVenC, an Open and Optimized VVC Encoder Implementation.
Proceedings of the IEEE International Symposium on Multimedia, 2022
2021
Visually Optimized Two-Pass Rate Control for Video Coding Using the Low-Complexity XPSNR Model.
Proceedings of the International Conference on Visual Communications and Image Processing, 2021
Proceedings of the 23rd International Workshop on Multimedia Signal Processing, 2021
Proceedings of the 2021 IEEE International Conference on Multimedia & Expo Workshops, 2021
2020
Proceedings of the 22nd IEEE International Workshop on Multimedia Signal Processing, 2020
2018
Generische Analysemethoden für den Systementwurf heterogener eingebetteter Mehrkernsysteme.
PhD thesis, 2018
2017
Simulation-based HW/SW co-exploration of the concurrent execution of HEVC intra encoding algorithms for heterogeneous multi-core architectures.
J. Syst. Archit., 2017
2015
Demonstrating an FPGA implementation of a full HD real-time HEVC decoder with memory optimizations for range extensions support.
Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015
Exploring the concurrent execution of HEVC intra encoding algorithms for heterogeneous multi core architectures.
Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015
2013
Proceedings of the IEEE Third International Conference on Consumer Electronics, 2013
Memory access analysis and optimization of a parallel H.264/SVC decoder for an embedded multi-core platform.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013
2012
Parallel paradigms and run-time management techniques for many-core architectures: the 2PARMA approach.
Proceedings of the 2012 Interconnection Network Architecture, 2012
A Generic and Non-intrusive Profiling Methodology for SystemC Multi-core Platform Simulation Models.
Proceedings of the Architecture of Computing Systems - ARCS 2012 - 25th International Conference, Munich, Germany, February 28, 2012
2011
Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011
2010
2PARMA: Parallel Paradigms and Run-Time Management Techniques for Many-Core Architectures.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-Core Architectures.
Proceedings of the VLSI 2010 Annual Symposium - Selected papers, 2010