Jenq Kuen Lee
Orcid: 0000-0001-9919-6258Affiliations:
- National Tsing-Hua University, Department of Computer Sciencem, Taiwan
According to our database1,
Jenq Kuen Lee
authored at least 148 papers
between 1991 and 2025.
Collaborative distances:
Collaborative distances:
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Bibliography
2025
J. Supercomput., January, 2025
2024
IEEE Access, 2024
Low DRAM Memory Access and Flexible Dataflow Convolutional Neural Network Accelerator based on RISC-V Custom Instruction.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Proceedings of the Workshop Proceedings of the 53rd International Conference on Parallel Processing, 2024
Proceedings of the Workshop Proceedings of the 53rd International Conference on Parallel Processing, 2024
2023
Connect. Sci., December, 2023
J. Signal Process. Syst., May, 2023
J. Signal Process. Syst., May, 2023
ACM Trans. Design Autom. Electr. Syst., 2023
Simulation Environment with Customized RISC-V Instructions for Logic-in-Memory Architectures.
CoRR, 2023
Proceedings of the 52nd International Conference on Parallel Processing Workshops, 2023
Proceedings of the 52nd International Conference on Parallel Processing Workshops, 2023
2022
ACM Trans. Embed. Comput. Syst., November, 2022
Case Study: Design Strategies for Enabling Visual Application Blocks of Bluetooth Library.
IEEE Access, 2022
Proceedings of the IWOCL'22: International Workshop on OpenCL, Bristol, United Kingdom, May 10, 2022
Proceedings of the Workshop Proceedings of the 51st International Conference on Parallel Processing, 2022
Proceedings of the Workshop Proceedings of the 51st International Conference on Parallel Processing, 2022
Proceedings of the Workshop Proceedings of the 51st International Conference on Parallel Processing, 2022
Proceedings of the Workshop Proceedings of the 51st International Conference on Parallel Processing, 2022
2021
ACM Trans. Parallel Comput., 2021
Proceedings of the IWOCL'21: International Workshop on OpenCL, Munich Germany, April, 2021, 2021
Accelerate Binarized Neural Networks with Processing-in-Memory Enabled by RISC-V Custom Instructions.
Proceedings of the ICPP Workshops 2021: 50th International Conference on Parallel Processing, 2021
Support Convolution of CNN with Compression Sparse Matrix Multiplication Flow in TVM.
Proceedings of the ICPP Workshops 2021: 50th International Conference on Parallel Processing, 2021
2020
J. Syst. Archit., 2020
Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020
Proceedings of the IWOCL '20: International Workshop on OpenCL, 2020
Proceedings of the ICPP Workshops '20: Workshops, Edmonton, AB, Canada, August 17-20, 2020, 2020
Proceedings of the ICPP Workshops '20: Workshops, Edmonton, AB, Canada, August 17-20, 2020, 2020
2019
J. Signal Process. Syst., 2019
J. Signal Process. Syst., 2019
Proceedings of the International Workshop on OpenCL, 2019
Proceedings of the International Workshop on OpenCL, 2019
Proceedings of the 48th International Conference on Parallel Processing, 2019
Proceedings of the 48th International Conference on Parallel Processing, 2019
2018
Architecture and Compiler Support for GPUs Using Energy-Efficient Affine Register Files.
ACM Trans. Design Autom. Electr. Syst., 2018
Proceedings of the International Workshop on OpenCL, 2018
Proceedings of the 47th International Conference on Parallel Processing, 2018
Proceedings of the 47th International Conference on Parallel Processing, 2018
Proceedings of the 47th International Conference on Parallel Processing, 2018
2017
J. Syst. Archit., 2017
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017
Proceedings of the 46th International Conference on Parallel Processing Workshops, 2017
Proceedings of the 46th International Conference on Parallel Processing Workshops, 2017
2016
Softw. Pract. Exp., 2016
Concurr. Comput. Pract. Exp., 2016
Proceedings of the 45th International Conference on Parallel Processing Workshops, 2016
OpenCV Optimization on Heterogeneous Multi-core Systems for Gesture Recognition Applications.
Proceedings of the 45th International Conference on Parallel Processing Workshops, 2016
A Probabilistic Framework for Compiler Optimization with Multithread Power-Gating Controls.
Proceedings of the 45th International Conference on Parallel Processing Workshops, 2016
2015
J. Signal Process. Syst., 2015
J. Signal Process. Syst., 2015
The Design and Experiments of A SID-Based Power-Aware Simulator for Embedded Multicore Systems.
ACM Trans. Design Autom. Electr. Syst., 2015
2014
J. Signal Process. Syst., 2014
J. Signal Process. Syst., 2014
ACM Trans. Design Autom. Electr. Syst., 2014
Achieving spilling-friendly register file assignment for highly distributed register files.
J. Supercomput., 2014
Concurr. Comput. Pract. Exp., 2014
Proceedings of the 20th IEEE International Conference on Parallel and Distributed Systems, 2014
Proceedings of the 20th IEEE International Conference on Parallel and Distributed Systems, 2014
Optimized memory access support for data layout conversion on heterogeneous multi-core systems.
Proceedings of the 12th IEEE Symposium on Embedded Systems for Real-time Multimedia, 2014
2013
Proceedings of the 42nd International Conference on Parallel Processing, 2013
Proceedings of the 11th IEEE Symposium on Embedded Systems for Real-time Multimedia, 2013
2012
IEEE Trans. Parallel Distributed Syst., 2012
Instruction scheduling methods and phase ordering framework for VLIW DSP processors with distributed register files.
J. Supercomput., 2012
Case study: stereo vision experiments with multi-core software API on embedded MPSoC environments.
J. Supercomput., 2012
ACM Trans. Embed. Comput. Syst., 2012
Concurr. Comput. Pract. Exp., 2012
Proceedings of the 41st International Conference on Parallel Processing Workshops, 2012
2011
Proceedings of the Encyclopedia of Parallel Computing, 2011
Parallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part I: Hardware Architecture & Software Development Tools.
J. Signal Process. Syst., 2011
Proceedings of the 2011 International Conference on Parallel Processing Workshops, 2011
Proceedings of the 13th IEEE International Conference on High Performance Computing & Communication, 2011
Proceedings of the 6th Workshop on Embedded Systems Education, 2011
Proceedings of the 9th IEEE Symposium on Embedded Systems for Real-Time Multimedia, 2011
Support of software framework for embedded multi-core systems with Android environments.
Proceedings of the 9th IEEE Symposium on Embedded Systems for Real-Time Multimedia, 2011
2010
Int. J. Embed. Syst., 2010
Proceedings of the Methods and Tools of Parallel Programming Multicomputers, 2010
Proceedings of the 2010 Workshop on Embedded Systems Education, 2010
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010
2009
LC-GRFA: global register file assignment with local consciousness for VLIW DSP processors with non-uniform register files.
Concurr. Comput. Pract. Exp., 2009
Efficient multiple virtual view generation based on reduced depth stereo image for advanced autostereoscopic displays.
Proceedings of the 2009 IEEE International Conference on Multimedia and Expo, 2009
Proceedings of the 2009 Workshop on Embedded Systems Education, 2009
pTest: An adaptive testing tool for concurrent software on embedded multicore processors.
Proceedings of the Design, Automation and Test in Europe, 2009
Support of Paged Register Files for Improving Context Switching on Embedded Processors.
Proceedings of the 12th IEEE International Conference on Computational Science and Engineering, 2009
2008
Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores.
J. Signal Process. Syst., 2008
Enhancing Microkernel Performance on VLIW DSP Processors via Multiset Context Switch.
J. Signal Process. Syst., 2008
J. Parallel Distributed Comput., 2008
The support of software design patterns for streaming RPC on embedded multicore processors.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008
Proceedings of the 2008 International Conference on Parallel Processing, 2008
Parallelization of belief propagation method on embedded multicore processors for stereo vision.
Proceedings of the 6th IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia, 2008
2007
ACM Trans. Design Autom. Electr. Syst., 2007
Energy-aware scheduling and simulation methodologies for parallel security processors with multiple voltage domains.
J. Supercomput., 2007
J. Supercomput., 2007
PALF: compiler supports for irregular register files in clustered VLIW DSP processors.
Concurr. Comput. Pract. Exp., 2007
Enabling compiler flow for embedded VLIW DSP processors with distributed register files.
Proceedings of the 2007 ACM SIGPLAN/SIGBED Conference on Languages, 2007
2006
Proceedings of the 12th IEEE Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2006), 2006
Proceedings of the 4th International Symposium on Principles and Practice of Programming in Java, 2006
Copy Propagation Optimizations for VLIW DSP Processors with Distributed Register Files.
Proceedings of the Languages and Compilers for Parallel Computing, 2006
Proceedings of the 2006 IEEE International Conference on Multimedia and Expo, 2006
Proceedings of the Embedded and Ubiquitous Computing, International Conference, 2006
2005
Concurr. Pract. Exp., 2005
Proceedings of the Languages and Compilers for Parallel Computing, 2005
Proceedings of the 34th International Conference on Parallel Processing (ICPP 2005), 2005
Proceedings of the EMSOFT 2005, 2005
System-level design space exploration for security processor prototyping in analytical approaches.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
IEEE Trans. Parallel Distributed Syst., 2004
Support and optimization for parallel sparse programs with array intrinsics of Fortran 90.
Parallel Comput., 2004
Case study: an infrastructure for C/ATLAS environments with object-oriented design and XML representation.
J. Syst. Softw., 2004
Proceedings of the Languages and Compilers for High Performance Computing, 2004
Specification and Architecture Supports for Component Adaptations on Distributed Environments.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004
Proceedings of IEEE International Conference on Communications, 2004
2003
ACM Trans. Design Autom. Electr. Syst., 2003
J. Supercomput., 2003
Compiler support for speculative multithreading architecture with probabilistic points-to analysis.
Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2003
2002
Proceedings of the Languages and Compilers for Parallel Computing, 15th Workshop, 2002
Proceedings of the Languages and Compilers for Parallel Computing, 15th Workshop, 2002
Proceedings of the 2002 Joint ACM-ISCOPE Conference on Java Grande 2002, 2002
Proceedings of the International Symposium on Parallel Architectures, 2002
2001
J. Supercomput., 2001
J. Parallel Distributed Comput., 2001
Proceedings of the Languages and Compilers for Parallel Computing, 2001
Probabilistic Inference Schemes for Sparsity Structures of Fortran 90 Array Intrinsics.
Proceedings of the 2001 International Conference on Parallel Processing, 2001
2000
J. Inf. Sci. Eng., 2000
Runtime Compositions and Optimizations of Parallel JavaBean Programs on Clustering Environments.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000
Proceedings of the Languages and Compilers for Parallel Computing, 2000
Proceedings of the 13th International Symposium on System Synthesis, 2000
1999
Parallel Comput., 1999
Compiler Optimizations for Parallel Sparse Programs with Array Intrinsics of Fortran 90.
Proceedings of the International Conference on Parallel Processing 1999, 1999
1998
J. Parallel Distributed Comput., 1998
An Expression-Rewriting Framework to Generic Communication Sets for HPF Programs with Block-Cyclic Distribution.
Proceedings of the 12th International Parallel Processing Symposium / 9th Symposium on Parallel and Distributed Processing (IPPS/SPDP '98), March 30, 1998
Efficient Support of Parallel Sparse Computation for Array Intrinsic Functions of Fortran 90.
Proceedings of the 12th international conference on Supercomputing, 1998
1997
J. Parallel Distributed Comput., 1997
Towards Automatic Support of Parallel Sparse Computation in Java with Continuous Compilation.
Concurr. Pract. Exp., 1997
Sampling and Analytical Techniques for Data Distribution of Parallel Sparse Computation.
Proceedings of the Eighth SIAM Conference on Parallel Processing for Scientific Computing, 1997
Proceedings of the Conference on Parallel Computational Fluid Dynamics 1997, 1997
Integrating Automatic Data Alignment and Array Operation Synthesis to Optimize Data Parallel Programs.
Proceedings of the Languages and Compilers for Parallel Computing, 1997
Proceedings of the 1997 International Conference on Parallel Processing (ICPP '97), 1997
1996
Proceedings of the 1996 International Conference on Parallel Processing, 1996
1995
Language and Environment Support for Parallel Array Object I/O on Distributed Environments.
Proceedings of the Seventh SIAM Conference on Parallel Processing for Scientific Computing, 1995
Proceedings of the Fifth ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming (PPOPP), 1995
1993
Proceedings of the Seventeenth Annual International Computer Software and Applications Conference, 1993
1992
Sigma II: A Tool Kit for Building Parallelizing Compilers and Performance Analysis Systems.
Proceedings of the Programming Environments for Parallel Computing, 1992
On Using Object-Oriented Parallel Programming to Build Distributed Algebraic Abstractions.
Proceedings of the Parallel Processing: CONPAR 92, 1992
1991
Proceedings of the Proceedings Supercomputing '91, 1991