Jen-Chieh Tsai

According to our database, Jen-Chieh Tsai authored at least 7 papers between 2011 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2017

Adversarial domain separation and adaptation.

Jen-Chieh Tsai, Jen-Tzung Chien

Proceedings of the 27th IEEE International Workshop on Machine Learning for Signal Processing, 2017

2014

Boundary Conduction Mode Controlled Power Factor Corrector With Line Voltage Recovery and Total Harmonic Distortion Improvement Techniques.

Yi-Ping Su, Chia-Lung Ni, Chun-Yen Chen, Yi-Ting Chen, Jen-Chieh Tsai, Ke-Horng Chen

IEEE Trans. Ind. Electron., 2014

2013

High-PF and ultra-low-THD power factor correction controller by sinusoidal-wave synthesis and optimized THD control.

Chih-Wei Chang, Chia-Lung Ni, Jen-Chieh Tsai, Yi-Ting Chen, Chun-Yen Chen, Ke-Horng Chen, Long-Der Chen, Cheng-Chen Yang

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012

Triple loop modulation (TLM) for high reliability and efficiency in Power Factor Correction (PFC) system.

Jen-Chieh Tsai, Chia-Lung Ni, Chun-Yen Chen, Yi-Ting Chen, Chi-Lin Chen, Ke-Horng Chen

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

Dual Modulation Technique for High Efficiency in High-Switching Buck Converters Over a Wide Load Range.

Jen-Chieh Tsai, Tsung-Ying Huang, Wang-Wei Lai, Ke-Horng Chen

IEEE Trans. Circuits Syst. I Regul. Pap., 2011

Modified Hysteretic Current Control (MHCC) for Improving Transient Response of Boost Converter.

Jen-Chieh Tsai, Chi-Lin Chen, Yu-Huei Lee, Hong-Yuan Yang, Ming-Shen Hsu, Ke-Horng Chen

IEEE Trans. Circuits Syst. I Regul. Pap., 2011

Perturbation on-time (POT) control and inhibit time control (ITC) in suppression of THD of power factor correction (PFC) design.

Jen-Chieh Tsai, Chi-Lin Chen, Yi-Ting Chen, Chia-Lung Ni, Chun-Yen Chen, Ke-Horng Chen, Chih-Jen Chen, Heng-Lin Pan

Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011