Jean-Pierre Nozieres

According to our database, Jean-Pierre Nozieres authored at least 5 papers between 2007 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

SOT-MRAM - Third generation MRAM memory opens new opportunities : Hot Chips Conference August 2021.

Barry Hoberman, Jean-Pierre Nozieres

Proceedings of the IEEE Hot Chips 33 Symposium, 2021

2014

Magnetic memories: From DRAM replacement to ultra low power logic chips.

Guillaume Prenat, Gregory di Pendina, Christophe Layer, Olivier Goncalves, K. Jaber, Bernard Dieny, Ricardo C. Sousa, Ioan Lucian Prejbeanu, Jean-Pierre Nozieres

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

Scalability and logic functionalities of TA-MRAMs.

Ioan Lucian Prejbeanu, Ricardo C. Sousa, Bernard Dieny, Jean-Pierre Nozieres, S. Bandiera, Jérémy Alvarez-Herault, Q. Stainer, L. Lombard, Clarisse Ducruet, Y. Conraux, Ken Mackay

Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

2011

Hybrid CMOS/Magnetic Process Design Kit and application to the design of high-performances non-volatile logic circuits.

Guillaume Prenat, Bernard Dieny, Jean-Pierre Nozieres, Gregory di Pendina, Kholdoun Torki

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

2007

CMOS/Magnetic Hybrid Architectures.

Guillaume Prenat, Mourad El Baraji, Wei Guo, Ricardo Sousa, Liliana Buda-Prejbeanu, Bernard Dieny, Virgile Javerliac, Jean-Pierre Nozieres, Weisheng Zhao, Eric Belhaire

Proceedings of the 14th IEEE International Conference on Electronics, 2007