Jean-Noël Quintin

According to our database1, Jean-Noël Quintin authored at least 12 papers between 2010 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2018
Node-Type-Based Load-Balancing Routing for Parallel Generalized Fat-Trees.
Proceedings of the 4th IEEE International Workshop on High-Performance Interconnection Networks in the Exascale and Big-Data Era, 2018

2016
The BXI routing architecture for exascale supercomputer.
J. Supercomput., 2016

Transitively Deadlock-Free Routing Algorithms.
Proceedings of the 2nd IEEE International Workshop on High-Performance Interconnection Networks in the Exascale and Big-Data Era HiPINEB@HPCA 2016, 2016

2015
Hierarchical approach to optimization of parallel matrix multiplication on large-scale platforms.
J. Supercomput., 2015

Topology-oblivious optimization of MPI broadcast algorithms on extreme-scale platforms.
Simul. Model. Pract. Theory, 2015

Fault-Tolerant Routing for Exascale Supercomputer: The BXI Routing Architecture.
Proceedings of the 2015 IEEE International Conference on Cluster Computing, 2015

2014
Topology-Aware Optimization of Communications for Parallel Matrix Multiplication on Hierarchical Heterogeneous HPC Platform.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

High-Level Topology-Oblivious Optimization of MPI Broadcast Algorithms on Extreme-Scale Platforms.
Proceedings of the Euro-Par 2014: Parallel Processing Workshops, 2014

2013
Hierarchical Parallel Matrix Multiplication on Large-Scale Distributed Memory Platforms.
Proceedings of the 42nd International Conference on Parallel Processing, 2013

2012
WSCOM: Online Task Scheduling with Data Transfers.
Proceedings of the 12th IEEE/ACM International Symposium on Cluster, 2012

2011
Equilibrage de charge dynamique sur plates-formes hiérarchiques. (dynamic Load-Balancing on hierarchical platforms).
PhD thesis, 2011

2010
Hierarchical Work-Stealing.
Proceedings of the Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference, Ischia, Italy, August 31, 2010


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