Jean-Marc Daveau

According to our database, Jean-Marc Daveau authored at least 33 papers between 1995 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

Analysis of Combinational Circuit Failure Rate based on Graph Partitioning and Probabilistic Binomial Approach.

Esther Goudet, Fabio Sureau, Paul Breuil, Luis Peña Treviño, Lirida A. B. Naviner, Jean-Marc Daveau, Philippe Roche

J. Electron. Test., June, 2024

Drift of Combinational Circuits Failure Rates with a Probabilistic Model Approximated by Partitioning.

Esther Goudet, Luis Peña Treviño, Gutemberg G. dos Santos Júnior, Sayah El Hajji, Fabio Sureau, Lirida Naviner, Jean-Marc Daveau, Philippe Roche

Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

Formal Fault Injection in Digital Blocks with Mined Assertions.

Damiano Zuccalà, Paul Breuil, Jean-Marc Daveau, Philippe Roche, Katell Morin-Allory

Proceedings of the 22nd ACM-IEEE International Symposium on Formal Methods and Models for System Design, 2024

Formal Resilience Metric Characterization in Complex Digital Systems.

Damiano Zuccalà, Jean-Marc Daveau, Philippe Roche, Katell Morin-Allory

Proceedings of the IEEE European Test Symposium, 2024

2023

Fast analysis of combinatorial netlists correctness rate based on binomial law and partitioning.

Esther Goudet, Luis Peña Treviño, Lirida A. B. Naviner, Jean-Marc Daveau, Philippe Roche

Proceedings of the 24th IEEE Latin American Test Symposium, 2023

Formal Temporal Characterization of Register Vulnerability in Digital Circuits.

Damiano Zuccalà, Jean-Marc Daveau, Philippe Roche, Katell Morin-Allory

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023

2022

Software Product Reliability Based on Basic Block Metrics Recomposition.

Tiziano Fiorucci, Giorgio Di Natale, Jean-Marc Daveau, Philippe Roche

Proceedings of the 28th IEEE International Symposium on On-Line Testing and Robust System Design, 2022

2021

Automated Dysfunctional Model Extraction for Model Based Safety Assessment of Digital Systems.

Tiziano Fiorucci, Jean-Marc Daveau, Giorgio Di Natale, Philippe Roche

Proceedings of the 27th IEEE International Symposium on On-Line Testing and Robust System Design, 2021

FIRECAP: Fail-Reason Capturing hardware module for a RISC-V based System on a Chip.

Sébastien Thomet, Serge De Paoli, Jean-Marc Daveau, Valérie Bertin, Fady Abouzeid, Philippe Roche, Fakhreddine Ghaffari, Olivier Romain

Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021

2018

A 2.7 pJ/cycle 16 MHz, 0.7 µW Deep Sleep Power ARM Cortex-M0+ Core SoC in 28 nm FD-SOI.

Guenole Lallement, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Philippe Roche, Jean-Luc Autran

IEEE J. Solid State Circuits, 2018

2017

A 2.7pJ/cycle 16MHz SoC with 4.3nW power-off ARM Cortex-M0+ core in 28nm FD-SOI.

Guenole Lallement, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Philippe Roche, Jean-Luc Autran

Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

2016

30% static power improvement on ARM Cortex^®-A53 using static biasing-anticipation.

Fady Abouzeid, Christophe Bernicot, Sylvain Clerc, Jean-Marc Daveau, Gilles Gasiot, Daniel Noblet, Dimitri Soussan, Philippe Roche

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016

2015

Partial triplication of a SPARC-V8 microprocessor using fault injection.

Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche

Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

8.4 A 0.33V/-40°C process/temperature closed-loop compensation SoC embedding all-digital clock multiplier and DC-DC converter exploiting FDSOI 28nm back-gate biasing.

Sylvain Clerc, Mehdi Saligane, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Cyril Bottoni, David Bol, Julien De Vos, Dominique Zamora, Benjamin Coeffic, Dimitri Soussan, Damien Croain, Mehdi Naceur, Pierre Schamberger, Philippe Roche, Dennis Sylvester

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technology.

Sylvain Clerc, Fady Abouzeid, Darayus Adil Patel, Jean-Marc Daveau, Cyril Bottoni, Lorenzo Ciampolini, Fabien Giner, David Meyer, Robin Wilson, Philippe Roche, Sylvie Naudet, Arnaud Virazel, Alberto Bosio, Patrick Girard

Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

Frequency and voltage effects on SER on a 65nm Sparc-V8 microprocessor under radiation test.

Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Gilles Gasiot, Fady Abouzeid, Sylvain Clerc, Lirida A. B. Naviner, Philippe Roche

Proceedings of the IEEE International Reliability Physics Symposium, 2015

28nm FD-SOI technology and design platform for sub-10pJ/cycle and SER-immune 32bits processors.

Fady Abouzeid, Sylvain Clerc, Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Damien Croain, Gilles Gasiot, Dimitri Soussan, Philippe Roche

Proceedings of the ESSCIRC Conference 2015, 2015

2011

An approach to reduce computational cost in combinatorial logic netlist reliability analysis using circuit clustering and conditional probabilities.

Josep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche

Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

2010

Fast reliability analysis of combinatorial logic circuits using conditional probabilities.

Josep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche

Microelectron. Reliab., 2010

Handling reconvergent paths using conditional probabilities in combinatorial logic netlist reliability estimation.

Josep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche

Proceedings of the 17th IEEE International Conference on Electronics, 2010

Verification of soft error detection mechanism through fault injection on hardware emulation platform.

Oscar Bailan, Umberto Rossi, Anne Wantens, Jean-Marc Daveau, Salvatore Nappi, Philippe Roche

Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W 2010), Chicago, Illinois, USA, June 28, 2010

2008

Growing Interest of Advanced Commercial CMOS Technologies for Space and Medical Applications. Illustration with a New Nano-Power and Radiation-Hardened SRAM in 130nm CMOS.

Philippe Roche, Mark Lysinger, Gilles Gasiot, Jean-Marc Daveau, Mehdi Zamanian, Pierre Dautriche

Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

2004

A retargetable register allocation framework for embedded processors.

Jean-Marc Daveau, Thomas Thery, Thierry Lepley, Miguel Santana

Proceedings of the 2004 ACM SIGPLAN/SIGBED Conference on Languages, 2004

2002

FlexCC2: An Optimizing Retargetable C Compiler for DSP Processors.

Valérie Bertin, Jean-Marc Daveau, Philippe Guillaume, Thierry Lepley, Denis Pilat, Claire Richard, Miguel Santana, Thomas Thery

Proceedings of the Embedded Software, Second International Conference, 2002

2001

Automating the Design of SOCs Using Cores.

Reinaldo A. Bergamaschi, Subhrajit Bhattacharya, Ronoldo Wagner, Colleen Fellenz, Michael Muhlada, William R. Lee, Foster White, Jean-Marc Daveau

IEEE Des. Test Comput., 2001

2000

Interlanguage Communication Synthesis for Heterogeneous Specifications.

Fabiano Hessel, Pascal Coste, Philippe Le Marrec, Nacer-Eddine Zergainoh, Gabriela Nicolescu, Jean-Marc Daveau, Ahmed Amine Jerraya

Des. Autom. Embed. Syst., 2000

1999

Communication Interface Synthesis for Multilanguage Specifications.

Fabiano Hessel, Philippe Coste, P. LeMarrec, Nacer-Eddine Zergainoh, Jean-Marc Daveau, Ahmed Amine Jerraya

Proceedings of the Tenth IEEE International Workshop on Rapid System Prototyping (RSP 1999), 1999

1998

Hardware/Software Co-Design Methodology for Design of Embedded Systems.

Mohamed Abid, Tarek Ben Ismail, Adel Changuel, Carlos A. Valderrama, Mohamed Romdhani, Gilberto Fernandes Marchioro, Jean-Marc Daveau, Ahmed Amine Jerraya

Integr. Comput. Aided Eng., 1998

Hardware/software co-design of an ATM network interface card: a case study.

Jean-Marc Daveau, Gilberto Fernandes Marchioro, Ahmed Amine Jerraya

Proceedings of the Sixth International Workshop on Hardware/Software Codesign, 1998

1997

Protocol selection and interface generation for HW-SW codesign.

Jean-Marc Daveau, Gilberto Fernandes Marchioro, Tarek Ben Ismail, Ahmed Amine Jerraya

IEEE Trans. Very Large Scale Integr. Syst., 1997

Transformational partitioning for co-design of multiprocessor systems.

Gilberto Fernandes Marchioro, Jean-Marc Daveau, Ahmed Amine Jerraya

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

1996

A system-level communication synthesis approach for hardware/software systems.

Tarek Ben Ismail, Jean-Marc Daveau, Kevin O'Brien, Ahmed Amine Jerraya

Microprocess. Microsystems, 1996

1995

Synthesis of system-level communication by an allocation-based approach.

Jean-Marc Daveau, Tarek Ben Ismail, Ahmed Amine Jerraya

Proceedings of the 8th International Symposium on System Synthesis (ISSS 1995), 1995