Jean Luc Philippe

According to our database1, Jean Luc Philippe authored at least 41 papers between 1993 and 2017.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
Autonomous Safety System for a Smart Stove for Cognitively Impaired People.
Proceedings of the Highlights of Practical Applications of Cyber-Physical Multi-Agent Systems, 2017

2016
Proposal of an Adaptive Service Providing System for a Multi-User Smart Home.
Proceedings of the Artificial Intelligence Applied to Assistive Technologies and Smart Environments, 2016

2012
System services partitioning in ambient assisted living environment.
Proceedings of the 2012 ACM Conference on Ubiquitous Computing, 2012

2010
A Framework based on a High Conception Level to Generate Configurations in Production Systems.
Proceedings of the ICINCO 2010, 2010

2009
Multi-Level Reconfiguration in the DANAH Assistive System.
Proceedings of the IEEE International Conference on Systems, 2009

Service Reconfiguration in the DANAH Assistive System.
Proceedings of the Ambient Assistive Health and Wellness Management in the Heart of the City, 2009

2008
System Level Design Space Exploration for Multiprocessor System on Chip.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

2007
Using model engineering for the criticality analysis of reconfigurable manufacturing systems architectures.
Int. J. Manuf. Technol. Manag., 2007

Communication-Oriented Design Space Exploration for Reconfigurable Architectures.
EURASIP J. Embed. Syst., 2007

Generation of control for conveying systems based on component approach.
Proceedings of the IEEE International Conference on Systems, 2007

A component-based approach for conveying systems control design.
Proceedings of the ICINCO 2007, 2007

2006
Algorithmic-level Specification and Characterization of Embedded Multimedia Applications with Design Trotter.
J. VLSI Signal Process., 2006

Exploration de l'espace de conception des architectures reconfigurables.
Tech. Sci. Informatiques, 2006

Design Space Pruning Through Early Estimations of Area/Delay Tradeoffs for FPGA Implementations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

RTDT: A static QoS manager, RT scheduling, HW/SW partitioning CAD tool.
Microelectron. J., 2006

EPICURE: A partitioning and co-design framework for reconfigurable computing.
Microprocess. Microsystems, 2006

Design of multimedia processor based on metric computation
CoRR, 2006

System Level Design with UML: a Unified Approach.
Proceedings of the International Symposium on Industrial Embedded Systems, 2006

2005
Design-Trotter: System-level dynamic estimation task a first step towards platform architecture selection.
J. Embed. Comput., 2005

Design of a multimedia processor based on metrics computation.
Adv. Eng. Softw., 2005

A component based approach for the design of FMS control and supervision.
Proceedings of the IEEE International Conference on Systems, 2005

Generic Design Space Exploration for Reconfigurable Architectures.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

2003
Estimation du parallélisme au niveau système pour l'exploration de l'espace de conception de systèmes enfouis.
Tech. Sci. Informatiques, 2003

Integration of reconfiguration in transitic systems: an agent-based approach.
Proceedings of the IEEE International Conference on Systems, 2003

Interface design approach for system on chip based on configuration.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Fast prototyping of reconfigurable architectures from a C program.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Targeting Tiled Architectures in Design Exploration.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

Communication Costs Driven Design Space Exploration for Reconfigurable Architectures.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

An estimation and exploration methodology from system-level specifications: application to FPGAs.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

Fast Design Space Exploration Method for Reconfigurable Architectures.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

Multi-Granularity Metrics for the Era of Strongly Personalized SOCs.
Proceedings of the 2003 Design, 2003

2002
Large exploration for HW/SW partitioning of multirate and aperiodic real-time systems.
Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002

Design-Trotter: a multimedia embedded systems design space exploration tool.
Proceedings of the IEEE 5th Workshop on Multimedia Signal Processing, 2002

2000
Teaching hardware/software system codesign using CAD tools: a case study in image synthesis.
IEEE Trans. Educ., 2000

A scheduling framework for system-level estimation.
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000

Area time power estimation for FPGA based designs at a behavioral level.
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000

1999
A Co-Design Methodology for Telecommunication Systems: A Case Study of an Acoustic Echo Canceller.
J. VLSI Signal Process., 1999

1997
VLSI high level synthesis of fast exact least mean square algorithms based on fast FIR filters.
Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

Hardware interface design for real time embedded systems.
Proceedings of the 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 1997

1996
Memory aspects in signal processing and HLS tool: Some results.
Proceedings of the 8th European Signal Processing Conference, 1996

1993
GAUT: An architectural synthesis tool for dedicated signal processors.
Proceedings of the European Design Automation Conference 1993, 1993


  Loading...