Jean-Louis Sanchez

According to our database, Jean-Louis Sanchez authored at least 7 papers between 2004 and 2010.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2010

Measurement of Charge Evolution in Oxides of DC Stressed MOS Structures.

Ludovic Boyer, Petru Notingher Jr., Serge Agnel, Bernard Rousset, Jean-Louis Sanchez

Proceedings of the Annual Meeting of the IEEE Industry Applications Society, 2010

2008

Analysis of Data Obtained Using the Thermal Step Method on a MOS Structure - An Electrostatic Approach.

Ludovic Boyer, Olivier Fruchier, Petru Notingher Jr., Serge Agnel, Alain Toureille, Bernard Rousset, Jean-Louis Sanchez

Proceedings of the Industry Applications Society Annual Meeting, 2008

2007

Applications of the Thermal Step Method to the Characterization of Electric Charge in MOS Components.

Olivier Fruchier, Petru Notingher Jr., Serge Agnel, Alain Toureille, F. Forest, S. Cunningham, Bernard Rousset, Jean-Louis Sanchez

Proceedings of the Conference Record of the 2007 IEEE Industry Applications Conference Forty-Second IAS Annual Meeting, 2007

2006

Integrated IGBT short-circuit protection structure: Design and optimization.

C. Caramel, P. Austin, Jean-Louis Sanchez, E. Imbernon, Marie Breil

Microelectron. J., 2006

A vertical monolithical MOS thyristor bi-directional device.

A. Bourennane, Marie Breil, Jean-Louis Sanchez, J. Jalade

Microelectron. J., 2006

2004

New distributed model of NPT IGBT dedicated to power circuits design.

Guillaume Bonnet, Patrick Austin, Jean-Louis Sanchez

Microelectron. Reliab., 2004

A new triggering mode in a vertical bi-directional MOS-thyristor device.

Abdelhakim Bourennane, Marie Breil, Jean-Louis Sanchez, P. Austin, J. Jalade

Microelectron. J., 2004