Jean-Louis Carbonéro

According to our database1, Jean-Louis Carbonéro authored at least 11 papers between 2005 and 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2010
Fault Coverage on RF VCOs and BIST for Wafer Sort Using Peak-to-Peak Voltage Detectors.
J. Electron. Test., 2010

2009
BIST scheme for RF VCOs allowing the self-correction of the cut.
Proceedings of the 2009 IEEE International Test Conference, 2009

2008
Choice of a High-Level Fault Model for the Optimization of Validation Test Set Reused for Manufacturing Test.
VLSI Design, 2008

Decreasing Test Qualification Time in AMS and RF Systems.
IEEE Des. Test Comput., 2008

2007
Qualification of behavioral level design validation for AMS & RF SoCs.
Proceedings of the IFIP VLSI-SoC 2007, 2007

A stereo audio Σ∑ ADC architecture with embedded SNDR self-test.
Proceedings of the 2007 IEEE International Test Conference, 2007

Interactive presentation: Evaluation of test measures for LNA production testing using a multinormal statistical model.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
A BIST Scheme for SNDR Testing of SigmaDelta ADCs Using Sine-Wave Fitting.
J. Electron. Test., 2006

A SNDR BIST for Sigma-Delta Analogue-to-Digital Converters.
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

Behavioral Modeling of WCDMA Transceiver with VHDL-AMS Language.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

2005
Optimising Test Sets for a Low Noise Amplifier with a Defect-Oriented Approach.
Proceedings of the 2005 Design, 2005


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