Jean Lou Desbarbieux

According to our database1, Jean Lou Desbarbieux authored at least 7 papers between 2001 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2012
An out-of-order superscalar processor on FPGA: The ReOrder Buffer design.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
Morpheo: A high-performance processor generator for a FPGA implementation.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

2010
A Polynomial Algorithm to Prove Deadlock-Freeness of Wormhole Networks.
Proceedings of the 18th Euromicro Conference on Parallel, 2010

2008
A tool for automatic detection of deadlock in wormhole networks on chip.
ACM Trans. Design Autom. Electr. Syst., 2008

2004
High Level Synthesis Methodology from C to FPGA Used for a Network Protocol Communication.
Proceedings of the 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 2004

2003
Design Validation of ZCSP with SPIN.
Proceedings of the 3rd International Conference on Application of Concurrency to System Design (ACSD 2003), 2003

2001
Protocol and Performance Analysis of the MPC Parallel Computer.
Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001


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