Jean Jimenez

According to our database, Jean Jimenez authored at least 10 papers between 2010 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

Symmetrical ESD protection for advanced CMOS technology dedicated to 100 GHz RF application.

Philippe Galy, T. Lim, J. Bourgeat, Jean Jimenez, Boris Heitz, D. Marin-Cudraz, Ph. Benech, J. M. Fournier

Microelectron. Reliab., 2013

ESD protection using BIMOS transistor in 100 GHz RF application for advanced CMOS technology.

Philippe Galy, T. Lim, Jean Jimenez, Boris Heitz, Ph. Benech, J. M. Fournier, D. Marin-Cudraz

Proceedings of 2013 International Conference on IC Design & Technology, 2013

6T SRAM performance and power gain using double gate MOS in 28nm FDSOI technology.

Vivek Asthana, Malathi Kar, Jean Jimenez, Sébastien Haendler, Philippe Galy

Proceedings of 2013 International Conference on IC Design & Technology, 2013

Circuit optimization of 4T, 6T, 8T, 10T SRAM bitcells in 28nm UTBB FD-SOI technology using back-gate bias control.

Vivek Asthana, Malathi Kar, Jean Jimenez, Jean-Philippe Noel, Sébastien Haendler, Philippe Galy

Proceedings of the ESSCIRC 2013, 2013

2012

Symmetrical ESD trigger and pull-up using BIMOS transistor in advanced CMOS technology.

Philippe Galy, Johan Bourgeat, Jean Jimenez, Nicolas Guitard, Alexandre Dray, Ghislain Troussier, Blaise Jacquier, David Marin-Cudraz

Microelectron. Reliab., 2012

High swing low capacitance ESD RF protections in advanced CMOS technologies.

Jean Jimenez, Philippe Galy, Johan Bourgeat, Boris Heitz

Proceedings of the IEEE International Conference on IC Design & Technology, 2012

BIMOS transistor and its applications in ESD protection in advanced CMOS technology.

Philippe Galy, Jean Jimenez, Johan Bourgeat, A. Dray, Ghislain Troussier, Boris Heitz, Nicolas Guitard, David Marin-Cudraz, H. Beckrich-Ros

Proceedings of the IEEE International Conference on IC Design & Technology, 2012

2011

Reliability impact due to high current, lattice and hot carriers temperatures on β^(2×2) matrix ESD power devices for advanced CMOS technologies.

Philippe Galy, J. Bourgeat, Jean Jimenez, Blaise Jacquier, D. Marin-Cudraz, Sylvain Dudit

Microelectron. Reliab., 2011

A full characterization of single pitch IO ESD protection based on silicon controlled rectifier and dynamic trigger circuit in CMOS 32 nm node.

J. Bourgeat, Philippe Galy, A. Dray, Jean Jimenez, D. Marin-Cudraz, Blaise Jacquier

Microelectron. Reliab., 2011

2010

Inventory of silicon signatures induced by CDM event on deep sub-micronic CMOS-BICMOS technologies.

Philippe Galy, Sylvain Dudit, Michel Vallet, Ph. Larre, M. Bilinski, E. Petit, J. Beltritti, A. Dray, Jean Jimenez, Frank Jezequel, R. Chevallier, C. Boutonnat, V. Varo

Microelectron. Reliab., 2010