Jean DaRolt

According to our database1, Jean DaRolt authored at least 12 papers between 2011 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2014
Thwarting Scan-Based Attacks on Secure-ICs With On-Chip Comparison.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Test Versus Security: Past and Present.
IEEE Trans. Emerg. Top. Comput., 2014

2013
A novel differential scan attack on advanced DFT structures.
ACM Trans. Design Autom. Electr. Syst., 2013

Secure JTAG Implementation Using Schnorr Protocol.
J. Electron. Test., 2013

A smart test controller for scan chains in secure circuits.
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

2012
Scan attacks on side-channel and fault attack resistant public-key implementations.
J. Cryptogr. Eng., 2012

Are advanced DfT structures sufficient for preventing scan-attacks?
Proceedings of the 30th IEEE VLSI Test Symposium, 2012

On-chip test comparison for protecting confidential data in secure ICs.
Proceedings of the 17th IEEE European Test Symposium, 2012

A scan-based attack on Elliptic Curve Cryptosystems in presence of industrial Design-for-Testability structures.
Proceedings of the 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2012

A New Scan Attack on RSA in Presence of Industrial Countermeasures.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2012

2011
New security threats against chips containing scan chain structures.
Proceedings of the HOST 2011, 2011

Scan Attacks and Countermeasures in Presence of Scan Response Compactors.
Proceedings of the 16th European Test Symposium, 2011


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