Jean-Christophe Prévotet

Orcid: 0000-0001-6951-4702

According to our database1, Jean-Christophe Prévotet authored at least 59 papers between 2001 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Do Not Trust Power Management: Challenges and Hints for Securing Future Trusted Execution Environments.
CoRR, 2024

Streamlined Models of CMOS Image Sensors Carbon Impacts.
Proceedings of the 27th Euromicro Conference on Digital System Design, 2024

2023
A Seamless Integration Solution for LoRaWAN Into 5G System.
IEEE Internet Things J., September, 2023

High-level power estimation techniques in embedded systems hardware: an overview.
J. Supercomput., March, 2023

Secure proxy MIPv6-based mobility solution for LPWAN.
Wirel. Networks, 2023

High-Level Online Power Monitoring of FPGA IP Based on Machine Learning.
Proceedings of the Design and Architecture for Signal and Image Processing, 2023

2022
Modeling of Energy Consumption for Wired Access Control Systems.
Proceedings of the 11th International Conference on Sensor Networks, 2022

High-Level Early Power Estimation of FPGA IP Based on Machine Learning.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
RTL to Transistor Level Power Modeling and Estimation Techniques for FPGA and ASIC: A Survey.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Overview of the mobility related security challenges in LPWANs.
Comput. Networks, 2021

An Automated and Centralized Data Generation and Acquisition System.
Proceedings of the 28th IEEE International Conference on Electronics, 2021

2020
NeuPow: A CAD Methodology for High-level Power Estimation Based on Machine Learning.
ACM Trans. Design Autom. Electr. Syst., 2020

Polarization-Based Reconfigurable Tags for Robust Ambient Backscatter Communications.
IEEE Open J. Commun. Soc., 2020

Mobility Management With Session Continuity During Handover in LPWAN.
IEEE Internet Things J., 2020

Media independent solution for mobility management in heterogeneous LPWAN technologies.
Comput. Networks, 2020

2019
Ker-ONE: A new hypervisor managing FPGA reconfigurable accelerators.
J. Syst. Archit., 2019

Internet of Mobile Things: Overview of LoRaWAN, DASH7, and NB-IoT in LPWANs Standards and Supported Mobility.
IEEE Commun. Surv. Tutorials, 2019

Single-Carrier Spatial Modulation for the Internet of Things: Design and Performance Evaluation by Using Real Compact and Reconfigurable Antennas.
IEEE Access, 2019

Demo Abstract: Spatial modulation based transmission using a reconfigurable antenna.
Proceedings of the IEEE INFOCOM 2019, 2019

Implementation of SCHC in NS-3 and Comparison with 6LoWPAN.
Proceedings of the 26th International Conference on Telecommunications, 2019

Efficient OS Hardware Accelerators Preemption Management in FPGA.
Proceedings of the International Conference on Field-Programmable Technology, 2019

First Experimental Ambient Backscatter Communication Using a Compact Reconfigurable Tag Antenna.
Proceedings of the 2019 IEEE Globecom Workshops, Waikoloa, HI, USA, December 9-13, 2019, 2019

NeuPow: artificial neural networks for power and behavioral modeling of arithmetic components in 45nm ASICs technology.
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

SCHC-Based Solution for Roaming in LoRaWAN.
Proceedings of the Advances on Broad-Band Wireless Computing, Communication and Applications, 2019

Contributions to the Design of Reconfigurable Embedded Systems: from Modelling to Implementation.
, 2019

2018
A Neural Network Based Handover for Multi-RAT Heterogeneous Networks with Learning Agent.
Proceedings of the 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2018

Overview and Measurement of Mobility in DASH7.
Proceedings of the 25th International Conference on Telecommunications, 2018

Power modeling on FPGA: a neural model for RT-level power estimation.
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018

2017
ARM-FPGA-based platform for reconfigurable wireless communication systems using partial reconfiguration.
EURASIP J. Embed. Syst., 2017


The Radio Waves Display: An intuitive way to show green techniques for 5G to the general public.
Proceedings of the 2017 IEEE International Conference on Communications Workshops, 2017

Dynamic power estimation based on switching activity propagation.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Demo: WIFI-WiMax vertical handover on an ARM-FPGA platform with partial reconfiguration.
Proceedings of the 2017 Conference on Design and Architectures for Signal and Image Processing, 2017

2016
Energy efficiency analysis of hybrid-ARQ relay-assisted schemes in LTE-based systems.
EURASIP J. Wirel. Commun. Netw., 2016

Fast Power and Energy Efficiency Analysis of FPGA-based Wireless Base-band Processing.
CoRR, 2016

Fast Power and Performance Evaluation of FPGA-Based Wireless Communication Systems.
IEEE Access, 2016

Dynamic and partial reconfiguration power consumption runtime measurements analysis for ZYNQ SoC devices.
Proceedings of the International Symposium on Wireless Communication Systems, 2016

Efficient modelling of FPGA-based IP blocks using neural networks.
Proceedings of the International Symposium on Wireless Communication Systems, 2016

Receive Antenna Shift Keying Modulation Testbed for Wireless Communications Systems.
Proceedings of the 2016 IEEE Globecom Workshops, Washington, DC, USA, December 4-8, 2016, 2016

Hypervisor mechanisms to manage FPGA reconfigurable accelerators.
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

Demo: Ker-ONE: Embedded virtualization approach with dynamic reconfigurable accelerators management.
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

ARM-FPGA based platform for automated adaptive wireless communication systems using partial reconfiguration technique.
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

2015
Mini-NOVA: A Lightweight ARM-based Virtualization Microkernel Supporting Dynamic Partial Reconfiguration.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

Dynamic power evaluation of LTE wireless baseband processing on FPGA.
Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015

2014
Microkernel dedicated for dynamic partial reconfiguration on ARM-FPGA platform.
SIGBED Rev., 2014

2013
Evaluation of the overheads and latencies of a virtualized RTOS.
Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013

Evaluation of an RTOS on top of a hosted virtual machine system.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

2012
Modeling Adaptive Coded Modulation in real time partially reconfigurable mobile terminals.
Proceedings of the 20th European Signal Processing Conference, 2012

2011
Building a RTOS for MPSoC dataflow programming.
Proceedings of the 2011 International Symposium on System on Chip, 2011

2009
OveRSoC: A Framework for the Exploration of RTOS for RSoC Platforms.
Int. J. Reconfigurable Comput., 2009

Hardware Architecture for Pattern Recognition in Gamma-Ray Experiment.
EURASIP J. Embed. Syst., 2009

Implementation of a reconfigurable Fast Fourier Transform application to digital terrestrial television broadcasting.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

High-Level Exploration for Dynamic Reconfiguration Management.
Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2009

2008
A Framework for the Exploration of RTOS Dedicated to the Management of Hardware Reconfigurable Resources.
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

Neural network hardware architecture for pattern recognition in the HESS2 project.
Proceedings of the 16th European Symposium on Artificial Neural Networks, 2008

2005
Exploring RTOS issues with a high-level model of a reconfigurable SoC platform.
Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005

2003
Fast triggering in high-energy physics experiments using hardware neural networks.
IEEE Trans. Neural Networks, 2003

2002
Hardware solutions for implementation of neural networks in High Energy Physics triggers.
Proceedings of the 10th Eurorean Symposium on Artificial Neural Networks, 2002

2001
Combining signal processing and machine learning techniques for real time measurement of raindrops.
IEEE Trans. Instrum. Meas., 2001


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