Jean Bélanger
According to our database1,
Jean Bélanger
authored at least 16 papers
between 2003 and 2017.
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Bibliography
2017
IEEE Trans. Ind. Informatics, 2017
2016
An induction machine and power electronic test system on a field-programmable gate array.
Math. Comput. Simul., 2016
2015
A Modular Multilevel Converter Pulse Generation and Capacitor Voltage Balance Method Optimized for FPGA Implementation.
IEEE Trans. Ind. Electron., 2015
FPGA-based real-time simulation of a PSIM model: An indirect matrix converter case study.
Proceedings of the IECON 2015, 2015
2014
Proceedings of the 23rd IEEE International Symposium on Industrial Electronics, 2014
Real-time simulation of modular multilevel converter on FPGA with sub-microsecond time-step.
Proceedings of the IECON 2014 - 40th Annual Conference of the IEEE Industrial Electronics Society, Dallas, TX, USA, October 29, 2014
2013
A fully automated reconfigurable calculation engine dedicated to the real-time simulation of high switching frequency power electronic circuits.
Math. Comput. Simul., 2013
Real-time and faster-than-real-time simulation of Modular Multilevel Converters using standard multi-core CPU and FPGA chips.
Proceedings of the IECON 2013, 2013
Validation of eHS FPGA reconfigurable low-latency electric and power electronic circuit solver.
Proceedings of the IECON 2013, 2013
2012
Real-Time Simulation Using Transient Stability, ElectroMagnetic Transient and FPGA-Based High-Resolution Solvers.
Proceedings of the 2012 SC Companion: High Performance Computing, 2012
Effective floating-point calculation engines intended for the FPGA-based HIL simulation.
Proceedings of the 21st IEEE International Symposium on Industrial Electronics, 2012
General-purpose reconfigurable low-latency electric circuit and motor drive solver on FPGA.
Proceedings of the 38th Annual Conference on IEEE Industrial Electronics Society, 2012
2010
Real-Time Simulation of a Wind Turbine Generator Coupled With a Battery Supercapacitor Energy Storage System.
IEEE Trans. Ind. Electron., 2010
2008
FPGA-based Ultra-Low Latency HIL Fault Testing of a Permanent Magnet Motor Drive using RT-LAB-XSG.
Simul., 2008
2004
Proceedings of the 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 2004
2003
Accurate simulation of a 6-pulse inverter with real-time event compensation in ARTEMIS<sup>TM</sup>.
Math. Comput. Simul., 2003