Jean Anne C. Incorvia

Orcid: 0000-0002-4805-2112

According to our database1, Jean Anne C. Incorvia authored at least 26 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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On csauthors.net:

Bibliography

2024
Kinematic Model of Magnetic Domain Wall Motion for Fast, High-Accuracy Simulations.
CoRR, 2024

Domain Wall Magnetic Tunnel Junction Reliable Integrate and Fire Neuron.
CoRR, 2024

Towards Reverse-Engineering the Brain: Brain-Derived Neuromorphic Computing Approach with Photonic, Electronic, and Ionic Dynamicity in 3D integrated circuits.
CoRR, 2024

Device Codesign using Reinforcement Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
Magnetic skyrmions and domain walls for logical and neuromorphic computing.
Neuromorph. Comput. Eng., June, 2023

Cascaded Logic Gates Based on High-Performance Ambipolar Dual-Gate WSe2 Thin Film Transistors.
CoRR, 2023

Stochastic Domain Wall-Magnetic Tunnel Junction Artificial Neurons for Noise-Resilient Spiking Neural Networks.
CoRR, 2023

Roadmap for Unconventional Computing with Nanotechnology.
CoRR, 2023

2022
Logical and Physical Reversibility of Conservative Skyrmion Logic.
CoRR, 2022

Intrinsic Lateral Inhibition Facilitates Winner-Take-All in Domain Wall Racetrack Arrays for Neuromorphic Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Purely Spintronic Leaky Integrate-and-Fire Neurons.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Probabilistic Neural Circuits leveraging AI-Enhanced Codesign for Random Number Generation.
Proceedings of the IEEE International Conference on Rebooting Computing, 2022

Fuse and Mix: MACAM-Enabled Analog Activation for Energy-Efficient Neural Acceleration.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

2021
Hybrid Pass Transistor Logic With Ambipolar Transistors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Shape-Dependent Multi-Weight Magnetic Artificial Synapses for Neuromorphic Computing.
CoRR, 2021

High-Speed CMOS-Free Purely Spintronic Asynchronous Recurrent Neural Network.
CoRR, 2021

Skyrmion Logic Clocked via Voltage Controlled Magnetic Anisotropy.
CoRR, 2021

Controllable reset behavior in domain wall-magnetic tunnel junction artificial neurons for task-adaptable computation.
CoRR, 2021

2020
Domain Wall Leaky Integrate-and-Fire Neurons with Shape-Based Configurable Activation Functions.
CoRR, 2020

Unsupervised Competitive Hardware Learning Rule for Spintronic Clustering Architecture.
CoRR, 2020

CMOS-Free Multilayer Perceptron Enabled by Four-Terminal MTJ Device.
CoRR, 2020

Process Variation Model and Analysis for Domain Wall-Magnetic Tunnel Junction Logic.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

CMOS-Free Magnetic Domain Wall Leaky Integrate-and-Fire Neurons with Intrinsic Lateral Inhibition.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Plasticity-Enhanced Domain-Wall MTJ Neural Networks for Energy-Efficient Online Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Exploiting Dual-Gate Ambipolar CNFETs for Scalable Machine Learning Classification.
CoRR, 2019

Shape-based Magnetic Domain Wall Drift for an Artificial Spintronic Leaky Integrate-and-Fire Neuron.
CoRR, 2019


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