Jean A. Peperstraete
According to our database1,
Jean A. Peperstraete
authored at least 35 papers
between 1982 and 1998.
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Bibliography
1998
Proceedings of the 11th International Symposium on System Synthesis, 1998
1997
Proceedings of the Proceedings 8th IEEE International Workshop on Rapid System Prototyping: Shortening the Path from Specification to Prototype, 1997
Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets.
Proceedings of the 34st Conference on Design Automation, 1997
1996
Implementing DSP applications on heterogeneous targets using minimal size data buffers.
Proceedings of the Seventh IEEE International Workshop on Rapid System Prototyping (RSP '96), 1996
Proceedings of the 4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96), 1996
Proceedings of the Euro-Par '96 Parallel Processing, 1996
1995
PDG: A process-level debugger for concurrent programs in the GRAPE parallel programming environment.
Future Gener. Comput. Syst., 1995
Computer, 1995
Proceedings of the Sixth IEEE International Workshop on Rapid System Prototyping (RSP '95), 1995
A Loader for Injured Massively Parallel Regular Networks.
Proceedings of the Seventh IASTED/ISMM International Conference on Parallel and Distributed Computing and Systems, 1995
A User-Adaptable Fault Tolerant Motor Controller using an Argument Flow Multiprocessor System.
Proceedings of the Seventh IASTED/ISMM International Conference on Parallel and Distributed Computing and Systems, 1995
A User-triggered Checkpointing Library for Computationintensive Applications.
Proceedings of the Seventh IASTED/ISMM International Conference on Parallel and Distributed Computing and Systems, 1995
Proceedings of the 1995 International Conference on Acoustics, 1995
Proceedings of the 28th Annual Hawaii International Conference on System Sciences (HICSS-28), 1995
Proceedings of the 7th Euromicro Workshop on Real-Time Systems, 1995
1994
Closse Approximations of Sigmoid Functions by Sum of Step for VLSI Implementation of Neural Networks.
Sci. Ann. Cuza Univ., 1994
Fault-Tolerant Compact Routing Based on Reduced Structural Information in Wormhole-Switching Based Networks.
Proceedings of the Structural Information and Communication Complexity, 1994
Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, 1994
Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, 1994
PDG: A Portable Process-Level Debugger for CSP-Style Parallel Programs.
Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994
Proceedings of the 2nd European Symposium on Artificial Neural Networks, 1994
Control of a Dead-time Process by a Fuzzy Algorithm.
Proceedings of the 12st IASTED International Conference on Applied Informatics, 1994
1993
J. VLSI Signal Process., 1993
PDG: a process-level debugger for concurrent programs in the GRAPE rapid prototyping environment.
Proceedings of the Fourth International Workshop on Rapid System Prototyping, 1993
Proceedings of the Fourth International Workshop on Rapid System Prototyping, 1993
Proceedings of the 1st European Symposium on Artificial Neural Networks, 1993
1992
GRAPE-II: a tool for the rapid prototyping of multi-rate asynchronous DSP applications on heterogeneous multiprocessors.
Proceedings of the Third International Workshop on Rapid System Prototyping, 1992
1991
Proceedings of the Parallel Computation, First International ACPC Conference, Salzburg, Austria, September 30, 1991
1990
Proceedings of the First International Workshop on Rapid System Prototyping, 1990
1987
An Integrated Software-Hardware Multiprocesor Project.
Proceedings of the International Conference on Parallel Processing, 1987
1983
Proceedings of the 10th Annual Symposium on Computer Architecture, 1983, 1983
1982
Proceedings of the 9th International Symposium on Computer Architecture (ISCA 1982), 1982