Je-Kwang Cho
Orcid: 0000-0003-4065-4351
According to our database1,
Je-Kwang Cho
authored at least 11 papers
between 2003 and 2020.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2020
A Low-Voltage-Driven High-Voltage SRAM Pixel Circuit for Power Reduction in a Digital Micro-Display Panel.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
2019
A Low-Power Digital Pixel Driving Scheme for Single-Pulse-PWM-Based Display Using AND-Embedded Pixel Circuits.
IEEE Trans. Circuits Syst. Video Technol., 2019
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
A 6-mW, 70.1-dB SNDR, and 20-MHz BW Continuous-Time Sigma-Delta Modulator Using Low-Noise High-Linearity Feedback DAC.
IEEE Trans. Very Large Scale Integr. Syst., 2017
A 92-dB DR, 24.3-mW, 1.25-MHz BW Sigma-Delta Modulator Using Dynamically Biased Op Amp Sharing.
IEEE Trans. Very Large Scale Integr. Syst., 2017
A 2.24-mW, 61.8-dB SNDR, 20-MS/s Pipelined ADC With Charge-Pump-Based Dynamic Biasing for Power Reduction in Op Amp Sharing.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
2016
A Switched-Capacitor Filter With Reduced Sensitivity to Reference Noise for Audio-Band Sigma-Delta D/A Converters.
IEEE Trans. Circuits Syst. II Express Briefs, 2016
2014
IEICE Electron. Express, 2014
2004
A Σ-Δ fractional-N frequency synthesizer using a wide-band integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications.
IEEE J. Solid State Circuits, 2004
2003
A Σ-Δ fractional-N frequency synthesizer using a wideband integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications.
Proceedings of the ESSCIRC 2003, 2003
A 2-GHz wide band low phase noise voltage-controlled oscillator with on-chip LC tank.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003