Jayaraj U. Kidav

Orcid: 0000-0001-7266-3813

According to our database1, Jayaraj U. Kidav authored at least 10 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
Energy-Efficient Hardware Design for CNN-Based ECG Signal Classification in Wearable Bio-Medical Devices.
Proceedings of the 28th International Symposium on VLSI Design and Test, 2024

Dynamic Precision Scaling in MAC Units for Energy-Efficient Computations in Deep Neural Network Accelerators.
Proceedings of the 28th International Symposium on VLSI Design and Test, 2024

2022
Design of a 128-channel transceiver hardware for medical ultrasound imaging systems.
IET Circuits Devices Syst., 2022

A PC based Ultrasound back-end signal processor using Intel® Performance Primitives.
Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022

2021
A broadband MVDR beamforming core for ultrasound imaging.
Integr., 2021

2020
Design of AWC core using DCD iterations for MVDR beamformer.
Microprocess. Microsystems, 2020

Superior Implementation of Accelerated QR Decomposition for Ultrasound Imaging.
IEEE Access, 2020

2019
Architecture and FPGA prototype of cycle stealing DMA array signal processor for ultrasound sector imaging systems.
Microprocess. Microsystems, 2019

Design and Physical Implementation of Array Signal Processor ASIC for Sector Imaging Systems.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

2012
A VLSI Architecture for Wavelet Based Image Compression.
Proceedings of the Advances in Computing and Information Technology - Proceedings of the Second International Conference on Advances in Computing and Information Technology (ACITY) July 13-15, 2012, Chennai, India, 2012


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