Jayabrata Ghosh-Dastidar

According to our database, Jayabrata Ghosh-Dastidar authored at least 9 papers between 1998 and 2003.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2003

An efficient test vector compression scheme using selective Huffman coding.

Abhijit Jas, Jayabrata Ghosh-Dastidar, Mom-Eng Ng, Nur A. Touba

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

2001

On Diagnosing Path Delay Faults in an At-Speed Environment.

Ramesh C. Tekumalla, Srikanth Venkataraman, Jayabrata Ghosh-Dastidar

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

Improving Diagnostic Resolution of Delay Faults in FPGAs by Exploiting Reconfigurability.

Jayabrata Ghosh-Dastidar, Nur A. Touba

Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

2000

A Rapid and Scalable Diagnosis Scheme for BIST Environments with a Large Number of Scan Chains.

Jayabrata Ghosh-Dastidar, Nur A. Touba

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

Diagnosing resistive bridges using adaptive techniques.

Jayabrata Ghosh-Dastidar, Nur A. Touba

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999

Scan Vector Compression/Decompression Using Statistical Coding.

Abhijit Jas, Jayabrata Ghosh-Dastidar, Nur A. Touba

Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

Adaptive Techniques for Improving Delay Fault Diagnosis.

Jayabrata Ghosh-Dastidar, Nur A. Touba

Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

Fault diagnosis in scan-based BIST using both time and space information.

Jayabrata Ghosh-Dastidar, Debaleena Das, Nur A. Touba

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

1998

A Systematic Approach for Diagnosing Multiple Delay Faults.

Jayabrata Ghosh-Dastidar, Nur A. Touba

Proceedings of the 13th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '98), 1998