Jay H. O'Neill

According to our database1, Jay H. O'Neill authored at least 4 papers between 1993 and 2002.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
0
1
2
1
1
1
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2002
A CMOS low-power multiple 2.5-3.125-Gb/s serial link macrocellfor high IO bandwidth network ICs.
IEEE J. Solid State Circuits, 2002

2000
A single-chip, 1.6-billion, 16-b MAC/s multiprocessor DSP.
IEEE J. Solid State Circuits, 2000

1997
A low-power 128-tap digital adaptive equalizer for broadband modems.
IEEE J. Solid State Circuits, 1997

1993
A 200 MHz CMOS broad-band switching chip.
IEEE J. Solid State Circuits, March, 1993


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