Javier Martín-Langerwerf

According to our database1, Javier Martín-Langerwerf authored at least 11 papers between 2002 and 2011.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2011
Emulationsbasierte Analyse von Multiprozessorsystemen für Multimedia-Anwendungen.
PhD thesis, 2011

2010
A Multi-Shared Register File Structure for VLIW Processors.
J. Signal Process. Syst., 2010

A forwarding-sensitive instruction scheduling approach to reduce register file constraints in VLIW architectures.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010

2009
Instruction merging to increase parallelism in VLIW architectures.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

An Enhanced DMA Controller in SIMD Processors for Video Applications.
Proceedings of the Architecture of Computing Systems, 2009

2007
Design Space Exploration of Media Processors: A Parameterized Scheduler.
Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007

RAPANUI: A case study in Rapid Prototyping for Multiprocessor System-on-Chip.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

Design Space Exploration of Media Processors: A Generic VLIW Architecture and a Parameterized Scheduler.
Proceedings of the Architecture of Computing Systems, 2007

2005
RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration.
Proceedings of the Embedded Computer Systems: Architectures, 2005

2004
Performance Estimation of Streaming Media Applications for Reconfigurable Platforms.
Proceedings of the Computer Systems: Architectures, 2004

2002
Benefits of Macro-Based Multi-FPGA Partitioning for Video Processing Applications.
Proceedings of the 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 2002


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