Javier Granizo

According to our database, Javier Granizo authored at least 6 papers between 2022 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

A Second-Order Audio VCO-ADC with 103-dB-A Dynamic Range and Binary-Weighted Internal Architecture.

Victor Medina, Rubén Garvi, Javier Granizo, Pedro Amaral, Luis Hernández

CoRR, 2024

A Scalable and PVT Invariant Spiking Neuron Using Asynchronous CMOS Logic.

Dante Loi, Javier Granizo, Luis Hernández

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023

A VCO-ADC Linearized by a Capacitive Frequency-to-Current Converter.

Rubén Garvi, Javier Granizo, Eric Gutierrez, Victor Medina, Andreas Wiesbauer, Luis Hernández

IEEE Trans. Circuits Syst. II Express Briefs, June, 2023

A CMOS LIF neuron based on a charge-powered oscillator with time-domain threshold logic.

Javier Granizo, Rubén Garvi, Diego Garcia, Luis Hernández

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Validation of a CMOS SNN network based on a time-domain threshold neuron circuit achieving 114.90 pJ/inference on MNIST.

Diego Garcia, Javier Granizo, Luis Hernández

Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

2022

A 55nm CMOS Linearized Oscillator for Audio VCO-ADCs achieving 78dBA of SNDR with $153\mu \mathrm{W}$.

Rubén Garvi, Javier Granizo, Angel Salvador, Luis Hernández

Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022