Javier E. Soto
Orcid: 0000-0002-6057-0094
According to our database1,
Javier E. Soto
authored at least 12 papers
between 2014 and 2024.
Collaborative distances:
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Bibliography
2024
Proceedings of the 27th Euromicro Conference on Digital System Design, 2024
2023
A streaming algorithm and hardware accelerator to estimate the empirical entropy of network flows.
Comput. Networks, December, 2023
JACC-FPGA: A hardware accelerator for Jaccard similarity estimation using FPGAs in the cloud.
Future Gener. Comput. Syst., 2023
A Sketch-Based Algorithm for Network-Flow Entropy Estimation on Programmable Switches Using P4.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023
2021
A High-Throughput Hardware Accelerator for Network Entropy Estimation Using Sketches.
IEEE Access, 2021
2020
Multimodal registration of visible, SWIR and LWIR images in a distributed smart camera system.
Microprocess. Microsystems, 2020
A hardware accelerator for entropy estimation using the top-k most frequent elements.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020
2019
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019
2017
An intelligent readout integrated circuit (iROIC) with on-chip local gradient operations.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017
An embedded system for image segmentation and multimodal registration in noninvasive skin cancer screening.
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017
2014
Proposal and development of a highly modular and scalable self-adaptive hardware architecture with parallel processing capability.
PhD thesis, 2014