Javier Ardila
Orcid: 0000-0001-6331-3133
According to our database1,
Javier Ardila
authored at least 12 papers
between 2016 and 2024.
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Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
A 9.78-ENOB 10 MS/s SAR ADC with a Common Mode Compensation Technique in a 28nm CMOS Node.
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024
2021
A digital phase-based on-fly offset compensation method for decision feedback equalisers.
IET Circuits Devices Syst., 2021
2020
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
An Energy-Efficient RISC-V RV32IMAC Microcontroller for Periodical-Driven Sensing Applications.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020
2019
An All-Thin-Devices Level Shifter in Standard-Cell Format for Auto Place-and-Route Flow.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A Novel Loop Gain Adaptation Method for Digital CDRs Based on the Cross-Correlation Function.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018
2017
A Digital Offset Reduction Method for Dynamic Comparators Based on Phase Measurement.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
2016
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016