Javad Javidan

Orcid: 0000-0001-5860-5756

According to our database1, Javad Javidan authored at least 6 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Enhancing Data Storage Reliability and Error Correction in Multilevel NOR and NAND Flash Memories through Optimal Design of BCH Codes.
CoRR, 2023

High-Speed Area-Efficient Hardware Architecture for the Efficient Detection of Faults in a Bit-Parallel Multiplier Utilizing the Polynomial Basis of GF(2m).
CoRR, 2023

2016
Design of a ZVS PWM DC-DC converter for high gain applications.
Int. J. Circuit Theory Appl., 2016

2015
Analysis and design of a two-stage amplifier with enhanced performance.
Microelectron. J., 2015

2012
Circuit and system design for an 860-960 MHz RFID reader front-ends with Tx leakage suppression in 0.18 - µm CMOS technology.
Int. J. Circuit Theory Appl., 2012

2010
High Power Amplifier Based on a Transformer-Type Power Combiner in CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2010


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