Jasper Van Woudenberg

According to our database, Jasper Van Woudenberg authored at least 7 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Gate-Level Side-Channel Leakage Ranking With Architecture Correlation Analysis.

Pantea Kiaei, Yuan Yao, Zhenyuan Liu, Nicole Fern, Cees-Bart Breunesse, Jasper Van Woudenberg, Kate Gillis, Alex Dich, Peter Grossmann, Patrick Schaumont

IEEE Trans. Emerg. Top. Comput., 2024

Improving CPU Fault Injection Simulations: Insights from RTL to Instruction-Level Models.

Jasper Van Woudenberg, Rajesh Velegalati, Cees-Bart Breunesse, Dennis Vermoen Riscure

Proceedings of the Workshop on Fault Detection and Tolerance in Cryptography, 2024

2023

Special Session: CAD for Hardware Security - Promising Directions for Automation of Security Assurance.

Sohrab Aftabjahani, Mark M. Tehranipoor, Farimah Farahmandi, Bulbul Ahmed, Ryan Kastner, Francesco Restuccia, Andres Meza, Kaki Ryan, Nicole Fern, Jasper Van Woudenberg, Rajesh Velegalati, Cees-Bart Breunesse, Cynthia Sturton, Calvin Deutschbein

Proceedings of the 41st IEEE VLSI Test Symposium, 2023

Invited: Pre-silicon Side Channel and Fault Analysis.

Jasper Van Woudenberg, Peter Grossmann, Avinash Varna, Joseph Friel, Daniel Dinu, Ronnie Lindsay, Steve J. Brown

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

Gate-Level Side-Channel Leakage Assessment with Architecture Correlation Analysis.

Pantea Kiaei, Yuan Yao, Zhenyuan Liu, Nicole Fern, Cees-Bart Breunesse, Jasper Van Woudenberg, Kate Gillis, Alex Dich, Peter Grossmann, Patrick Schaumont

CoRR, 2022

2021

Rewrite to Reinforce: Rewriting the Binary to Apply Countermeasures against Fault Injection.

Pantea Kiaei, Cees-Bart Breunesse, Mohsen Ahmadi, Patrick Schaumont, Jasper Van Woudenberg

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

Verification of Power-based Side-channel Leakage through Simulation.

Yuan Yao, Patrick Schaumont, Jasper Van Woudenberg, Cees-Bart Breunesse, Edgar Mateos Santillan, Steve Stecyk

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020