Jason D. Bakos

ACM Trans. Reconfigurable Technol. Syst., September, 2024

FAMOUS: Flexible Accelerator for the Attention Mechanism of Transformer on UltraScale+ FPGAs.

[BibT_eX]

[DOI]

CoRR, 2024

ProTEA: Programmable Transformer Encoder Acceleration on FPGA.

[BibT_eX]

[DOI]

CoRR, 2024

IMAGine: An In-Memory Accelerated GEMV Engine Overlay.

[BibT_eX]

[DOI]

Proceedings of the 34th International Conference on Field-Programmable Logic and Applications, 2024

The BRAM is the Limit: Shattering Myths, Shaping Standards, and Building Scalable PIM Accelerators.

[BibT_eX]

[DOI]

Proceedings of the 32nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2024

2023

NAPOLY: A Non-deterministic Automata Processor OverLaY.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., September, 2023

Optimal Sampling Methodologies for High-rate Structural Twinning.

[BibT_eX]

[DOI]

Proceedings of the 26th International Conference on Information Fusion, 2023

FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?

[BibT_eX]

[DOI]

Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

Accelerating LSTM-Based High-Rate Dynamic System Models.

[BibT_eX]

[DOI]

Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

Making BRAMs Compute: Creating Scalable Computational Memory Fabric Overlays.

[BibT_eX]

[DOI]

Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

2022

High-Rate Machine Learning for Forecasting Time-Series Signals.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

2019

An Overlay Architecture for Pattern Matching.

[BibT_eX]

[DOI]

Charles Daniels

Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

OpenVX Graph Optimization for Visual Processor Units.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018

Introduction to the Special Section on FCCM'16.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2018

2017

A Dynamically Reconfigurable Automata Processor Overlay.

[BibT_eX]

[DOI]

Lothrop O. Richards

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

2016

High-level synthesis of a genomic database search engine.

[BibT_eX]

[DOI]

Jordan A. Bradshaw

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

Two-Hit Filter Synthesis for Genomic Database Search.

[BibT_eX]

[DOI]

Jordan A. Bradshaw

Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

2015

Memory Interface Design for 3D Stencil Kernels on a Massively Parallel Memory System.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2015

2014

Large-Scale Pairwise Sequence Alignments on a Large-Scale GPU Cluster.

[BibT_eX]

[DOI]

I. Savran

IEEE Des. Test, 2014

Lucas-Kanade Optical Flow estimation on the TI C66x digital signal processor.

[BibT_eX]

[DOI]

Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

Sparse matrix-vector multiply on the Keystone II Digital Signal Processor.

[BibT_eX]

[DOI]

Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

2013

An FPGA-Based Accelerator for Frequent Itemset Mining.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2013

Accelerating frequent itemset mining on graphics processing units.

[BibT_eX]

[DOI]

J. Supercomput., 2013

A Heuristic Scheduler for Port-Constrained Floating-Point Pipelines.

[BibT_eX]

[DOI]

Int. J. Reconfigurable Comput., 2013

Extending the BEAGLE library to a multi-FPGA platform.

[BibT_eX]

[DOI]

BMC Bioinform., 2013

Accuracy, cost, and performance tradeoffs for floating-point accumulation.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Memory Access Scheduling on the Convey HC-1.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

Sparse matrix-vector multiply on the Texas Instruments C6678 Digital Signal Processor.

[BibT_eX]

[DOI]

Proceedings of the 24th International Conference on Application-Specific Systems, 2013

2012

A Cluster-on-a-Chip Architecture for High-Throughput Phylogeny Search.

[BibT_eX]

[DOI]

Tiffany M. Mintz

IEEE Trans. Parallel Distributed Syst., 2012

2011

A Sparse Matrix Personality for the Convey HC-1.

[BibT_eX]

[DOI]

Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

GPApriori: GPU-Accelerated Frequent Itemset Mining.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International Conference on Cluster Computing (CLUSTER), 2011

Frequent Itemset Mining on Large-Scale Shared Memory Machines.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International Conference on Cluster Computing (CLUSTER), 2011

2010

High-Performance Heterogeneous Computing with the Convey HC-1.

[BibT_eX]

[DOI]

Comput. Sci. Eng., 2010

FPGA acceleration of the phylogenetic likelihood function for Bayesian MCMC inference methods.

[BibT_eX]

[DOI]

Stephanie Zierke

BMC Bioinform., 2010

2009

An integrated reduction technique for a double precision accumulator.

[BibT_eX]

[DOI]

Proceedings of the Third International Workshop on High-Performance Reconfigurable Computing Technology and Applications, 2009

Exploiting Matrix Symmetry to Improve FPGA-Accelerated Conjugate Gradient.

[BibT_eX]

[DOI]

Proceedings of the FCCM 2009, 2009

2008

A Special-Purpose Architecture for Solving the Breakpoint Median Problem.

[BibT_eX]

[DOI]

Panormitis E. Elenis

IEEE Trans. Very Large Scale Integr. Syst., 2008

2007

Lightweight Error Correction Coding for System-Level Interconnects.

[BibT_eX]

[DOI]

Donald M. Chiarulli

Steven P. Levitan

IEEE Trans. Computers, 2007

FPGA Acceleration of Gene Rearrangement Analysis.

[BibT_eX]

[DOI]

Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

FPGA Acceleration of Phylogeny Reconstruction for Whole Genome Data.

[BibT_eX]

[DOI]

Panormitis E. Elenis

Jijun Tang

Proceedings of the 7th IEEE International Conference on Bioinformatics and Bioengineering, 2007

2006

Predictive Load Balancing for Interconnected FPGAs.

[BibT_eX]

[DOI]

Charles L. Cathey

Allen Michalski

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

A Reconfigurable Distributed Computing Fabric Exploiting Multilevel Parallelism.

[BibT_eX]

[DOI]

Charles L. Cathey